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KVM: x86/mmu: Track shadow MMIO value on a per-VM basis
TDX will use a different shadow PTE entry value for MMIO from VMX. Add a member to kvm_arch and track value for MMIO per-VM instead of a global variable. By using the per-VM EPT entry value for MMIO, the existing VMX logic is kept working. Introduce a separate setter function so that guest TD can use a different value later. Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <229a18434e5d83f45b1fcd7bf1544d79db1becb6.1705965635.git.isaku.yamahata@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1313,6 +1313,8 @@ struct kvm_arch {
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*/
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spinlock_t mmu_unsync_pages_lock;
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u64 shadow_mmio_value;
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struct iommu_domain *iommu_domain;
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bool iommu_noncoherent;
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#define __KVM_HAVE_ARCH_NONCOHERENT_DMA
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@ -2462,7 +2462,7 @@ static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
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return kvm_mmu_prepare_zap_page(kvm, child,
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invalid_list);
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}
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} else if (is_mmio_spte(pte)) {
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} else if (is_mmio_spte(kvm, pte)) {
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mmu_spte_clear_no_track(spte);
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}
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return 0;
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@ -4144,7 +4144,7 @@ static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
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if (WARN_ON_ONCE(reserved))
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return -EINVAL;
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if (is_mmio_spte(spte)) {
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if (is_mmio_spte(vcpu->kvm, spte)) {
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gfn_t gfn = get_mmio_spte_gfn(spte);
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unsigned int access = get_mmio_spte_access(spte);
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@ -4760,7 +4760,7 @@ EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
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static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
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unsigned int access)
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{
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if (unlikely(is_mmio_spte(*sptep))) {
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if (unlikely(is_mmio_spte(vcpu->kvm, *sptep))) {
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if (gfn != get_mmio_spte_gfn(*sptep)) {
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mmu_spte_clear_no_track(sptep);
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return true;
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@ -6267,6 +6267,7 @@ static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
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void kvm_mmu_init_vm(struct kvm *kvm)
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{
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kvm->arch.shadow_mmio_value = shadow_mmio_value;
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INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
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INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
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INIT_LIST_HEAD(&kvm->arch.possible_nx_huge_pages);
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@ -74,10 +74,10 @@ u64 make_mmio_spte(struct kvm_vcpu *vcpu, u64 gfn, unsigned int access)
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u64 spte = generation_mmio_spte_mask(gen);
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u64 gpa = gfn << PAGE_SHIFT;
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WARN_ON_ONCE(!shadow_mmio_value);
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WARN_ON_ONCE(!vcpu->kvm->arch.shadow_mmio_value);
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access &= shadow_mmio_access_mask;
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spte |= shadow_mmio_value | access;
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spte |= vcpu->kvm->arch.shadow_mmio_value | access;
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spte |= gpa | shadow_nonpresent_or_rsvd_mask;
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spte |= (gpa & shadow_nonpresent_or_rsvd_mask)
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<< SHADOW_NONPRESENT_OR_RSVD_MASK_LEN;
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@ -265,9 +265,9 @@ static inline struct kvm_mmu_page *root_to_sp(hpa_t root)
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return spte_to_child_sp(root);
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}
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static inline bool is_mmio_spte(u64 spte)
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static inline bool is_mmio_spte(struct kvm *kvm, u64 spte)
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{
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return (spte & shadow_mmio_mask) == shadow_mmio_value &&
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return (spte & shadow_mmio_mask) == kvm->arch.shadow_mmio_value &&
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likely(enable_mmio_caching);
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}
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@ -495,8 +495,8 @@ static void handle_changed_spte(struct kvm *kvm, int as_id, gfn_t gfn,
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* impact the guest since both the former and current SPTEs
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* are nonpresent.
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*/
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if (WARN_ON_ONCE(!is_mmio_spte(old_spte) &&
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!is_mmio_spte(new_spte) &&
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if (WARN_ON_ONCE(!is_mmio_spte(kvm, old_spte) &&
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!is_mmio_spte(kvm, new_spte) &&
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!is_removed_spte(new_spte)))
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pr_err("Unexpected SPTE change! Nonpresent SPTEs\n"
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"should not be replaced with another,\n"
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@ -1028,7 +1028,7 @@ static int tdp_mmu_map_handle_target_level(struct kvm_vcpu *vcpu,
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}
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/* If a MMIO SPTE is installed, the MMIO will need to be emulated. */
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if (unlikely(is_mmio_spte(new_spte))) {
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if (unlikely(is_mmio_spte(vcpu->kvm, new_spte))) {
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vcpu->stat.pf_mmio_spte_created++;
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trace_mark_mmio_spte(rcu_dereference(iter->sptep), iter->gfn,
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new_spte);
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