arm64: dts: ti: k3-j721s2-main: Add CSI2 interrupts property

Add interrupts property for CDNS CSI2RX. Interrupt IDs are taken from the
J721S2 TRM [0].

Interrupt Line      | Source Interrupt
--------------------|-----------------------------
GIC500SS_SPI_IN_185 | CSI_RX_IF0_CSI_ERR_IRQ_OUT_0
GIC500SS_SPI_IN_184 | CSI_RX_IF0_CSI_IRQ_OUT_0
GIC500SS_SPI_IN_189 | CSI_RX_IF1_CSI_ERR_IRQ_OUT_0
GIC500SS_SPI_IN_188 | CSI_RX_IF1_CSI_IRQ_OUT_0

[0]: https://www.ti.com/lit/zip/spruj28

Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20250808095804.544298-2-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Yemike Abhilash Chandra 2025-08-08 15:27:58 +05:30 committed by Nishanth Menon
parent f13db4f77d
commit 94801d4bf1

View File

@ -1248,6 +1248,9 @@ ti_csi2rx0: ticsi2rx@4500000 {
cdns_csi2rx0: csi-bridge@4504000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x00 0x04504000 0x00 0x1000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 38 3>, <&k3_clks 38 1>, <&k3_clks 38 3>,
<&k3_clks 38 3>, <&k3_clks 38 4>, <&k3_clks 38 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
@ -1301,6 +1304,9 @@ ti_csi2rx1: ticsi2rx@4510000 {
cdns_csi2rx1: csi-bridge@4514000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x00 0x04514000 0x00 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 39 3>, <&k3_clks 39 1>, <&k3_clks 39 3>,
<&k3_clks 39 3>, <&k3_clks 39 4>, <&k3_clks 39 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",