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gpu: nova-core: falcon: Add support to write firmware version

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This will be needed by both the GSP boot code as well as GSP resume code
in the sequencer.

Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-14-8ae4058e3c0e@nvidia.com>
This commit is contained in:
Joel Fernandes 2025-11-10 22:34:22 +09:00 committed by Alexandre Courbot
parent bb58d1aee6
commit 945c1eee7d
2 changed files with 14 additions and 0 deletions
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8
drivers/gpu/nova-core/falcon.rs
View File

@ -621,4 +621,12 @@ pub(crate) fn is_riscv_active(&self, bar: &Bar0) -> bool {
let cpuctl = regs::NV_PRISCV_RISCV_CPUCTL::read(bar, &E::ID);
cpuctl.active_stat()
}
/// Write the application version to the OS register.
#[expect(dead_code)]
pub(crate) fn write_os_version(&self, bar: &Bar0, app_version: u32) {
regs::NV_PFALCON_FALCON_OS::default()
.set_value(app_version)
.write(bar, &E::ID);
}
}

6
drivers/gpu/nova-core/regs.rs
View File

@ -230,6 +230,12 @@ pub(crate) fn vga_workspace_addr(self) -> Option<u64> {
31:0 value as u32;
});
// Used to store version information about the firmware running
// on the Falcon processor.
register!(NV_PFALCON_FALCON_OS @ PFalconBase[0x00000080] {
31:0 value as u32;
});
register!(NV_PFALCON_FALCON_RM @ PFalconBase[0x00000084] {
31:0 value as u32;
});