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Merge branch 'mlx5-misc-fixes-2025-10-05'
Tariq Toukan says: ==================== mlx5 misc fixes 2025-10-05 This patchset provides misc bug fixes from the team to the mlx5 core and Eth drivers. ==================== Link: https://patch.msgid.link/1759652999-858513-1-git-send-email-tariqt@nvidia.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
commit
943af64788
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@ -772,6 +772,7 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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struct netlink_ext_ack *extack)
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{
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struct mlx5e_ipsec_sa_entry *sa_entry = NULL;
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bool allow_tunnel_mode = false;
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struct mlx5e_ipsec *ipsec;
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struct mlx5e_priv *priv;
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gfp_t gfp;
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@ -803,6 +804,20 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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goto err_xfrm;
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}
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if (mlx5_eswitch_block_mode(priv->mdev))
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goto unblock_ipsec;
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if (x->props.mode == XFRM_MODE_TUNNEL &&
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x->xso.type == XFRM_DEV_OFFLOAD_PACKET) {
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allow_tunnel_mode = mlx5e_ipsec_fs_tunnel_allowed(sa_entry);
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if (!allow_tunnel_mode) {
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NL_SET_ERR_MSG_MOD(extack,
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"Packet offload tunnel mode is disabled due to encap settings");
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err = -EINVAL;
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goto unblock_mode;
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}
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}
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/* check esn */
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if (x->props.flags & XFRM_STATE_ESN)
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mlx5e_ipsec_update_esn_state(sa_entry);
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@ -817,7 +832,7 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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err = mlx5_ipsec_create_work(sa_entry);
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if (err)
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goto unblock_ipsec;
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goto unblock_encap;
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err = mlx5e_ipsec_create_dwork(sa_entry);
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if (err)
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@ -832,14 +847,6 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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if (err)
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goto err_hw_ctx;
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if (x->props.mode == XFRM_MODE_TUNNEL &&
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x->xso.type == XFRM_DEV_OFFLOAD_PACKET &&
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!mlx5e_ipsec_fs_tunnel_enabled(sa_entry)) {
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NL_SET_ERR_MSG_MOD(extack, "Packet offload tunnel mode is disabled due to encap settings");
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err = -EINVAL;
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goto err_add_rule;
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}
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/* We use *_bh() variant because xfrm_timer_handler(), which runs
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* in softirq context, can reach our state delete logic and we need
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* xa_erase_bh() there.
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@ -855,8 +862,7 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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queue_delayed_work(ipsec->wq, &sa_entry->dwork->dwork,
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MLX5_IPSEC_RESCHED);
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if (x->xso.type == XFRM_DEV_OFFLOAD_PACKET &&
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x->props.mode == XFRM_MODE_TUNNEL) {
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if (allow_tunnel_mode) {
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xa_lock_bh(&ipsec->sadb);
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__xa_set_mark(&ipsec->sadb, sa_entry->ipsec_obj_id,
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MLX5E_IPSEC_TUNNEL_SA);
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@ -865,6 +871,11 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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out:
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x->xso.offload_handle = (unsigned long)sa_entry;
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if (allow_tunnel_mode)
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mlx5_eswitch_unblock_encap(priv->mdev);
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mlx5_eswitch_unblock_mode(priv->mdev);
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return 0;
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err_add_rule:
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@ -877,6 +888,11 @@ static int mlx5e_xfrm_add_state(struct net_device *dev,
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if (sa_entry->work)
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kfree(sa_entry->work->data);
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kfree(sa_entry->work);
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unblock_encap:
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if (allow_tunnel_mode)
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mlx5_eswitch_unblock_encap(priv->mdev);
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unblock_mode:
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mlx5_eswitch_unblock_mode(priv->mdev);
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unblock_ipsec:
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mlx5_eswitch_unblock_ipsec(priv->mdev);
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err_xfrm:
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@ -319,7 +319,7 @@ void mlx5e_accel_ipsec_fs_del_rule(struct mlx5e_ipsec_sa_entry *sa_entry);
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int mlx5e_accel_ipsec_fs_add_pol(struct mlx5e_ipsec_pol_entry *pol_entry);
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void mlx5e_accel_ipsec_fs_del_pol(struct mlx5e_ipsec_pol_entry *pol_entry);
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void mlx5e_accel_ipsec_fs_modify(struct mlx5e_ipsec_sa_entry *sa_entry);
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bool mlx5e_ipsec_fs_tunnel_enabled(struct mlx5e_ipsec_sa_entry *sa_entry);
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bool mlx5e_ipsec_fs_tunnel_allowed(struct mlx5e_ipsec_sa_entry *sa_entry);
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int mlx5_ipsec_create_sa_ctx(struct mlx5e_ipsec_sa_entry *sa_entry);
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void mlx5_ipsec_free_sa_ctx(struct mlx5e_ipsec_sa_entry *sa_entry);
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@ -1069,7 +1069,9 @@ static int rx_create(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,
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/* Create FT */
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if (mlx5_ipsec_device_caps(mdev) & MLX5_IPSEC_CAP_TUNNEL)
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rx->allow_tunnel_mode = mlx5_eswitch_block_encap(mdev);
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rx->allow_tunnel_mode =
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mlx5_eswitch_block_encap(mdev, rx == ipsec->rx_esw);
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if (rx->allow_tunnel_mode)
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flags = MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
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ft = ipsec_ft_create(attr.ns, attr.sa_level, attr.prio, 1, 2, flags);
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@ -1310,7 +1312,9 @@ static int tx_create(struct mlx5e_ipsec *ipsec, struct mlx5e_ipsec_tx *tx,
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goto err_status_rule;
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if (mlx5_ipsec_device_caps(mdev) & MLX5_IPSEC_CAP_TUNNEL)
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tx->allow_tunnel_mode = mlx5_eswitch_block_encap(mdev);
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tx->allow_tunnel_mode =
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mlx5_eswitch_block_encap(mdev, tx == ipsec->tx_esw);
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if (tx->allow_tunnel_mode)
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flags = MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
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ft = ipsec_ft_create(tx->ns, attr.sa_level, attr.prio, 1, 4, flags);
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@ -2846,18 +2850,24 @@ void mlx5e_accel_ipsec_fs_modify(struct mlx5e_ipsec_sa_entry *sa_entry)
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memcpy(sa_entry, &sa_entry_shadow, sizeof(*sa_entry));
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}
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bool mlx5e_ipsec_fs_tunnel_enabled(struct mlx5e_ipsec_sa_entry *sa_entry)
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bool mlx5e_ipsec_fs_tunnel_allowed(struct mlx5e_ipsec_sa_entry *sa_entry)
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{
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struct mlx5_accel_esp_xfrm_attrs *attrs = &sa_entry->attrs;
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struct mlx5e_ipsec_rx *rx;
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struct mlx5e_ipsec_tx *tx;
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struct mlx5e_ipsec *ipsec = sa_entry->ipsec;
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struct xfrm_state *x = sa_entry->x;
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bool from_fdb;
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rx = ipsec_rx(sa_entry->ipsec, attrs->addrs.family, attrs->type);
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tx = ipsec_tx(sa_entry->ipsec, attrs->type);
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if (sa_entry->attrs.dir == XFRM_DEV_OFFLOAD_OUT)
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return tx->allow_tunnel_mode;
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if (x->xso.dir == XFRM_DEV_OFFLOAD_OUT) {
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struct mlx5e_ipsec_tx *tx = ipsec_tx(ipsec, x->xso.type);
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return rx->allow_tunnel_mode;
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from_fdb = (tx == ipsec->tx_esw);
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} else {
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struct mlx5e_ipsec_rx *rx = ipsec_rx(ipsec, x->props.family,
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x->xso.type);
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from_fdb = (rx == ipsec->rx_esw);
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}
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return mlx5_eswitch_block_encap(ipsec->mdev, from_fdb);
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}
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void mlx5e_ipsec_handle_mpv_event(int event, struct mlx5e_priv *slave_priv,
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@ -893,27 +893,27 @@ int mlx5e_psp_init(struct mlx5e_priv *priv)
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if (!mlx5_is_psp_device(mdev)) {
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mlx5_core_dbg(mdev, "PSP offload not supported\n");
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return -EOPNOTSUPP;
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return 0;
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}
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if (!MLX5_CAP_ETH(mdev, swp)) {
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mlx5_core_dbg(mdev, "SWP not supported\n");
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return -EOPNOTSUPP;
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return 0;
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}
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if (!MLX5_CAP_ETH(mdev, swp_csum)) {
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mlx5_core_dbg(mdev, "SWP checksum not supported\n");
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return -EOPNOTSUPP;
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return 0;
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}
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if (!MLX5_CAP_ETH(mdev, swp_csum_l4_partial)) {
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mlx5_core_dbg(mdev, "SWP L4 partial checksum not supported\n");
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return -EOPNOTSUPP;
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return 0;
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}
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if (!MLX5_CAP_ETH(mdev, swp_lso)) {
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mlx5_core_dbg(mdev, "PSP LSO not supported\n");
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return -EOPNOTSUPP;
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return 0;
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}
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psp = kzalloc(sizeof(*psp), GFP_KERNEL);
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@ -879,7 +879,7 @@ void mlx5_eswitch_offloads_single_fdb_del_one(struct mlx5_eswitch *master_esw,
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struct mlx5_eswitch *slave_esw);
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int mlx5_eswitch_reload_ib_reps(struct mlx5_eswitch *esw);
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bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev);
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bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb);
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void mlx5_eswitch_unblock_encap(struct mlx5_core_dev *dev);
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int mlx5_eswitch_block_mode(struct mlx5_core_dev *dev);
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@ -974,7 +974,8 @@ mlx5_eswitch_reload_ib_reps(struct mlx5_eswitch *esw)
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return 0;
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}
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static inline bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev)
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static inline bool
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mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb)
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{
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return true;
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}
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@ -4006,23 +4006,25 @@ int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)
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return esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode);
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}
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bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev)
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bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb)
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{
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struct mlx5_eswitch *esw = dev->priv.eswitch;
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enum devlink_eswitch_encap_mode encap;
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bool allow_tunnel = false;
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if (!mlx5_esw_allowed(esw))
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return true;
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down_write(&esw->mode_lock);
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if (esw->mode != MLX5_ESWITCH_LEGACY &&
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esw->offloads.encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE) {
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up_write(&esw->mode_lock);
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return false;
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encap = esw->offloads.encap;
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if (esw->mode == MLX5_ESWITCH_LEGACY ||
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(encap == DEVLINK_ESWITCH_ENCAP_MODE_NONE && !from_fdb)) {
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allow_tunnel = true;
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esw->offloads.num_block_encap++;
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}
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esw->offloads.num_block_encap++;
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up_write(&esw->mode_lock);
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return true;
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return allow_tunnel;
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}
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void mlx5_eswitch_unblock_encap(struct mlx5_core_dev *dev)
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