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KVM: arm64: gic: Set vgic_model before initing private IRQs
Different GIC types require the private IRQs to be initialised differently. GICv5 is the culprit as it supports both a different number of private IRQs, and all of these are PPIs (there are no SGIs). Moreover, as GICv5 uses the top bits of the interrupt ID to encode the type, the intid also needs to computed differently. Up until now, the GIC model has been set after initialising the private IRQs for a VCPU. Move this earlier to ensure that the GIC model is available when configuring the private IRQs. While we're at it, also move the setting of the in_kernel flag and implementation revision to keep them grouped together as before. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Link: https://patch.msgid.link/20260128175919.3828384-7-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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@ -140,6 +140,10 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
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goto out_unlock;
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}
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kvm->arch.vgic.in_kernel = true;
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kvm->arch.vgic.vgic_model = type;
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kvm->arch.vgic.implementation_rev = KVM_VGIC_IMP_REV_LATEST;
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kvm_for_each_vcpu(i, vcpu, kvm) {
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ret = vgic_allocate_private_irqs_locked(vcpu, type);
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if (ret)
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@ -156,10 +160,6 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
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goto out_unlock;
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}
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kvm->arch.vgic.in_kernel = true;
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kvm->arch.vgic.vgic_model = type;
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kvm->arch.vgic.implementation_rev = KVM_VGIC_IMP_REV_LATEST;
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kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
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aa64pfr0 = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC;
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