From f1e33679367300a92b76cdec482adc430e5f79f7 Mon Sep 17 00:00:00 2001 From: Vishwaroop A Date: Tue, 6 May 2025 15:23:49 +0000 Subject: [PATCH 01/13] arm64: tegra: Configure QSPI clocks and add DMA For Tegra234 devices, set QSPI0_2X_PM to 199.99 MHz and QSPI0_PM to 99.99 MHz using PLLC as the parent clock. These frequencies enable Quad IO reads at up to 99.99 MHz, the maximum achievable given PLL and clock divider limitations. Introduce IOMMU property which is needed for internal DMA transfers. Signed-off-by: Vishwaroop A Link: https://lore.kernel.org/r/20250506152350.3370291-2-va@nvidia.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 2601b43b2d8c..12fc850f9f5c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -2948,6 +2948,11 @@ spi@3270000 { <&bpmp TEGRA234_CLK_QSPI0_PM>; clock-names = "qspi", "qspi_out"; resets = <&bpmp TEGRA234_RESET_QSPI0>; + iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>; + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI0_2X_PM>, + <&bpmp TEGRA234_CLK_QSPI0_PM>; + assigned-clock-rates = <199999999 99999999>; + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; status = "disabled"; }; @@ -3031,6 +3036,11 @@ spi@3300000 { <&bpmp TEGRA234_CLK_QSPI1_PM>; clock-names = "qspi", "qspi_out"; resets = <&bpmp TEGRA234_RESET_QSPI1>; + iommus = <&smmu_niso1 TEGRA234_SID_QSPI1>; + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI1_2X_PM>, + <&bpmp TEGRA234_CLK_QSPI1_PM>; + assigned-clock-rates = <199999999 99999999>; + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; status = "disabled"; }; From 34c6ba89e1487181b4278e5c1b329327439ec715 Mon Sep 17 00:00:00 2001 From: Akhil R Date: Tue, 6 May 2025 15:29:36 +0530 Subject: [PATCH 02/13] arm64: tegra: Add I2C aliases for Tegra234 Add aliases for all I2C nodes so that the I2C devnode numbers align with hardware bus number. Signed-off-by: Akhil R Link: https://lore.kernel.org/r/20250506095936.10687-4-akhilrajeev@nvidia.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 12fc850f9f5c..df034dbb8285 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -16,6 +16,18 @@ / { #address-cells = <2>; #size-cells = <2>; + aliases { + i2c0 = &gen1_i2c; + i2c1 = &gen2_i2c; + i2c2 = &cam_i2c; + i2c3 = &dp_aux_ch1_i2c; + i2c4 = &bpmp_i2c; + i2c5 = &dp_aux_ch0_i2c; + i2c6 = &dp_aux_ch2_i2c; + i2c7 = &gen8_i2c; + i2c8 = &dp_aux_ch3_i2c; + }; + bus@0 { compatible = "simple-bus"; From 01f11ffdfd909e870c3863af60875e8de328790a Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Thu, 1 May 2025 17:32:23 -0500 Subject: [PATCH 03/13] arm64: tegra: Enable PWM fan on the Jetson TX1 Devkit This is based on 6f78a94, which enabled added the fan and thermal zones for the Jetson Nano Devkit. The fan and thermal characteristics of the two devkits are similar, so using the same configuration. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250501-tx1-therm-v2-1-abdb1922c001@gmail.com Signed-off-by: Thierry Reding --- .../arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi index 83ed6ac2a8d8..584461f3a619 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi @@ -1623,6 +1623,18 @@ key-volume-up { }; }; + fan: pwm-fan { + compatible = "pwm-fan"; + pwms = <&pwm 3 45334>; + fan-supply = <&vdd_fan>; + interrupt-parent = <&gpio>; + interrupts = ; + + /* cooling level (0, 1, 2, 3) - pwm inverted */ + cooling-levels = <255 128 64 0>; + #cooling-cells = <2>; + }; + vdd_sys_mux: regulator-vdd-sys-mux { compatible = "regulator-fixed"; regulator-name = "VDD_SYS_MUX"; @@ -1778,4 +1790,67 @@ vdd_usb_vbus_otg: regulator-vdd-usb-vbus-otg { enable-active-high; vin-supply = <&vdd_5v0_sys>; }; + + vdd_fan: regulator-vdd-fan { + compatible = "regulator-fixed"; + regulator-name = "VDD_FAN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&exp1 4 GPIO_ACTIVE_LOW>; + vin-supply = <&vdd_5v0_sys>; + + regulator-enable-ramp-delay = <284>; + }; + + thermal-zones { + cpu-thermal { + trips { + cpu_trip_critical: critical { + temperature = <96500>; + hysteresis = <0>; + type = "critical"; + }; + + cpu_trip_hot: hot { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + cpu_trip_active: active { + temperature = <50000>; + hysteresis = <2000>; + type = "active"; + }; + + cpu_trip_passive: passive { + temperature = <30000>; + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + cooling-device = <&fan 3 3>; + trip = <&cpu_trip_critical>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&cpu_trip_hot>; + }; + + map2 { + cooling-device = <&fan 1 1>; + trip = <&cpu_trip_active>; + }; + + map3 { + cooling-device = <&fan 0 0>; + trip = <&cpu_trip_passive>; + }; + }; + }; + }; }; From b84f1c0187653b2a91919624e2da0dab0b036a6f Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 27 Apr 2025 15:05:32 -0500 Subject: [PATCH 04/13] arm64: tegra: Enable PWM fan on the Jetson TX2 Devkit This is based on the existing configuration of the Jetson TX2 NX devkit. The fan and thermal characteristics of the two devkits are similar, so using the same configuration. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250427-tx2-therm-v1-1-65ddb4314723@gmail.com Signed-off-by: Thierry Reding --- .../boot/dts/nvidia/tegra186-p2771-0000.dts | 109 ++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index 15aa49fc4503..a50fd205daa8 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -2409,6 +2409,10 @@ eeprom@57 { }; }; + pwm@c340000 { + status = "okay"; + }; + pcie@10003000 { status = "okay"; @@ -2508,6 +2512,16 @@ key-volume-up { }; }; + fan: pwm-fan { + compatible = "pwm-fan"; + pwms = <&pwm4 0 45334>; + fan-supply = <&vdd_fan>; + + /* cooling level (0, 1, 2, 3) - pwm inverted */ + cooling-levels = <255 128 64 0>; + #cooling-cells = <2>; + }; + vdd_sd: regulator-vdd-sd { compatible = "regulator-fixed"; regulator-name = "SD_CARD_SW_PWR"; @@ -2556,6 +2570,17 @@ vdd_usb1: regulator-vdd-usb1 { vin-supply = <&vdd_5v0_sys>; }; + vdd_fan: regulator-vdd-fan { + compatible = "regulator-fixed"; + regulator-name = "VDD_FAN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&exp1 4 GPIO_ACTIVE_LOW>; + + vin-supply = <&vdd_5v0_sys>; + }; + sound { compatible = "nvidia,tegra186-audio-graph-card"; status = "okay"; @@ -2621,4 +2646,88 @@ sound { label = "NVIDIA Jetson TX2 APE"; }; + + thermal-zones { + cpu-thermal { + polling-delay = <0>; + polling-delay-passive = <500>; + status = "okay"; + + trips { + cpu_trip_critical: critical { + temperature = <96500>; + hysteresis = <0>; + type = "critical"; + }; + + cpu_trip_hot: hot { + temperature = <79000>; + hysteresis = <2000>; + type = "hot"; + }; + + cpu_trip_active: active { + temperature = <62000>; + hysteresis = <2000>; + type = "active"; + }; + + cpu_trip_passive: passive { + temperature = <45000>; + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + cooling-device = <&fan 3 3>; + trip = <&cpu_trip_critical>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&cpu_trip_hot>; + }; + + map2 { + cooling-device = <&fan 1 1>; + trip = <&cpu_trip_active>; + }; + + map3 { + cooling-device = <&fan 0 0>; + trip = <&cpu_trip_passive>; + }; + }; + }; + + aux-thermal { + polling-delay = <0>; + polling-delay-passive = <500>; + status = "okay"; + + trips { + aux_alert0: critical { + temperature = <90000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + gpu-thermal { + polling-delay = <0>; + polling-delay-passive = <500>; + status = "okay"; + + trips { + gpu_alert0: critical { + temperature = <99000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; From 4cd763297c2203c6ba587d7d4a9105f96597b998 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Mon, 28 Apr 2025 20:51:47 -0500 Subject: [PATCH 05/13] arm64: tegra: Drop remaining serial clock-names and reset-names The referenced commit only removed some of the names, missing all that weren't in use at the time. The commit removes the rest. Fixes: 71de0a054d0e ("arm64: tegra: Drop serial clock-names and reset-names") Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250428-tegra-serial-fixes-v1-1-4f47c5d85bf6@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ------------ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 ------------ 2 files changed, 24 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 2b3bb5d0af17..f0b7949df92c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -621,9 +621,7 @@ uartb: serial@3110000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTB>; - clock-names = "serial"; resets = <&bpmp TEGRA186_RESET_UARTB>; - reset-names = "serial"; status = "disabled"; }; @@ -633,9 +631,7 @@ uartd: serial@3130000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTD>; - clock-names = "serial"; resets = <&bpmp TEGRA186_RESET_UARTD>; - reset-names = "serial"; status = "disabled"; }; @@ -645,9 +641,7 @@ uarte: serial@3140000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTE>; - clock-names = "serial"; resets = <&bpmp TEGRA186_RESET_UARTE>; - reset-names = "serial"; status = "disabled"; }; @@ -657,9 +651,7 @@ uartf: serial@3150000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTF>; - clock-names = "serial"; resets = <&bpmp TEGRA186_RESET_UARTF>; - reset-names = "serial"; status = "disabled"; }; @@ -1236,9 +1228,7 @@ uartc: serial@c280000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTC>; - clock-names = "serial"; resets = <&bpmp TEGRA186_RESET_UARTC>; - reset-names = "serial"; status = "disabled"; }; @@ -1248,9 +1238,7 @@ uartg: serial@c290000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTG>; - clock-names = "serial"; resets = <&bpmp TEGRA186_RESET_UARTG>; - reset-names = "serial"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 33f92b77cd9d..c36950774785 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -766,9 +766,7 @@ uartd: serial@3130000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTD>; - clock-names = "serial"; resets = <&bpmp TEGRA194_RESET_UARTD>; - reset-names = "serial"; status = "disabled"; }; @@ -778,9 +776,7 @@ uarte: serial@3140000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTE>; - clock-names = "serial"; resets = <&bpmp TEGRA194_RESET_UARTE>; - reset-names = "serial"; status = "disabled"; }; @@ -790,9 +786,7 @@ uartf: serial@3150000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTF>; - clock-names = "serial"; resets = <&bpmp TEGRA194_RESET_UARTF>; - reset-names = "serial"; status = "disabled"; }; @@ -817,9 +811,7 @@ uarth: serial@3170000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTH>; - clock-names = "serial"; resets = <&bpmp TEGRA194_RESET_UARTH>; - reset-names = "serial"; status = "disabled"; }; @@ -1616,9 +1608,7 @@ uartc: serial@c280000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTC>; - clock-names = "serial"; resets = <&bpmp TEGRA194_RESET_UARTC>; - reset-names = "serial"; status = "disabled"; }; @@ -1628,9 +1618,7 @@ uartg: serial@c290000 { reg-shift = <2>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTG>; - clock-names = "serial"; resets = <&bpmp TEGRA194_RESET_UARTG>; - reset-names = "serial"; status = "disabled"; }; From 39e1cbf57e3034bff1272b83b9e606a0bc2c3dc3 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Mon, 28 Apr 2025 20:51:48 -0500 Subject: [PATCH 06/13] arm64: tegra: Add DMA properties for Tegra186 and Tegra194 UARTs Adding the missing dmas and dma-names properties which are required for uart when using with the Tegra HSUART driver. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250428-tegra-serial-fixes-v1-2-4f47c5d85bf6@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 2 ++ .../nvidia/tegra186-p3509-0000+p3636-0001.dts | 2 ++ arch/arm64/boot/dts/nvidia/tegra186.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 2 ++ arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi | 2 ++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 16 ++++++++++++++++ 6 files changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index e2d6857a3709..51ced62cd42b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -61,6 +61,8 @@ memory-controller@2c00000 { }; serial@3100000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts b/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts index 26f71651933d..4ab66ebd874d 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts @@ -549,6 +549,8 @@ timer@3010000 { }; serial@3100000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index f0b7949df92c..f0c9295f55e7 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -612,6 +612,8 @@ uarta: serial@3100000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTA>; resets = <&bpmp TEGRA186_RESET_UARTA>; + dmas = <&gpcdma 8>, <&gpcdma 8>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -622,6 +624,8 @@ uartb: serial@3110000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTB>; resets = <&bpmp TEGRA186_RESET_UARTB>; + dmas = <&gpcdma 9>, <&gpcdma 9>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -632,6 +636,8 @@ uartd: serial@3130000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTD>; resets = <&bpmp TEGRA186_RESET_UARTD>; + dmas = <&gpcdma 19>, <&gpcdma 19>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -642,6 +648,8 @@ uarte: serial@3140000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTE>; resets = <&bpmp TEGRA186_RESET_UARTE>; + dmas = <&gpcdma 20>, <&gpcdma 20>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -652,6 +660,8 @@ uartf: serial@3150000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTF>; resets = <&bpmp TEGRA186_RESET_UARTF>; + dmas = <&gpcdma 12>, <&gpcdma 12>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -1229,6 +1239,8 @@ uartc: serial@c280000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTC>; resets = <&bpmp TEGRA186_RESET_UARTC>; + dmas = <&gpcdma 3>, <&gpcdma 3>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -1239,6 +1251,8 @@ uartg: serial@c290000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTG>; resets = <&bpmp TEGRA186_RESET_UARTG>; + dmas = <&gpcdma 2>, <&gpcdma 2>; + dma-names = "rx", "tx"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi index e8b296d9e0d3..43942db6eac9 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi @@ -104,6 +104,8 @@ input@2 { }; serial@3110000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi index 59860d19f0f6..a410fc335fa3 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi @@ -78,6 +78,8 @@ input@2 { }; serial@3100000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index c36950774785..3a4e086dcc8c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -747,6 +747,8 @@ uarta: serial@3100000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTA>; resets = <&bpmp TEGRA194_RESET_UARTA>; + dmas = <&gpcdma 8>, <&gpcdma 8>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -757,6 +759,8 @@ uartb: serial@3110000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTB>; resets = <&bpmp TEGRA194_RESET_UARTB>; + dmas = <&gpcdma 9>, <&gpcdma 9>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -767,6 +771,8 @@ uartd: serial@3130000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTD>; resets = <&bpmp TEGRA194_RESET_UARTD>; + dmas = <&gpcdma 19>, <&gpcdma 19>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -777,6 +783,8 @@ uarte: serial@3140000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTE>; resets = <&bpmp TEGRA194_RESET_UARTE>; + dmas = <&gpcdma 20>, <&gpcdma 20>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -787,6 +795,8 @@ uartf: serial@3150000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTF>; resets = <&bpmp TEGRA194_RESET_UARTF>; + dmas = <&gpcdma 12>, <&gpcdma 12>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -812,6 +822,8 @@ uarth: serial@3170000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTH>; resets = <&bpmp TEGRA194_RESET_UARTH>; + dmas = <&gpcdma 13>, <&gpcdma 13>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -1609,6 +1621,8 @@ uartc: serial@c280000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTC>; resets = <&bpmp TEGRA194_RESET_UARTC>; + dmas = <&gpcdma 3>, <&gpcdma 3>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -1619,6 +1633,8 @@ uartg: serial@c290000 { interrupts = ; clocks = <&bpmp TEGRA194_CLK_UARTG>; resets = <&bpmp TEGRA194_RESET_UARTG>; + dmas = <&gpcdma 2>, <&gpcdma 2>; + dma-names = "rx", "tx"; status = "disabled"; }; From 52dedbe81ee5e99b0d44321347fc85417837eea6 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sat, 26 Apr 2025 19:45:32 -0500 Subject: [PATCH 07/13] arm64: tegra: p3310: Explicitly enable GPU The gpu node originally was explicitly left disabled as it was expected for the bootloader to enable it. However, this is only done in U-Boot. If U-Boot is not in the boot chain, this will never be enabled. Other Tegra186 devices already explicitly enable the GPU, so make p3310 match. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250426-tx2-gpu-v1-1-fa1c78dcdbdc@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index 51ced62cd42b..970ce5a03540 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -193,6 +193,10 @@ pmc@c360000 { nvidia,invert-interrupt; }; + gpu@17000000 { + status = "okay"; + }; + bpmp { i2c { status = "okay"; From d1b72547610497ea4d0917214986cffb752a8710 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 20 Apr 2025 17:25:17 -0500 Subject: [PATCH 08/13] arm64: tegra: p2180: Explicitly enable GPU The gpu node originally was explicitly left disabled as it was expected for the bootloader to enable it. However, this is only done in u-boot. If u-boot is not in the boot chain, this will never be enabled. Other Tegra210 devices already explicitly enable the gpu, so make p2180 match. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250420-tx1-gpu-v1-1-d500de18e43e@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi index 9b9d1d15b0c7..c57bd1356381 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi @@ -24,6 +24,7 @@ memory@80000000 { gpu@57000000 { vdd-supply = <&vdd_gpu>; + status = "okay"; }; /* debug port */ From 9362175259281231e911aaeeebda833931aa5dfe Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sat, 19 Apr 2025 22:30:31 -0500 Subject: [PATCH 09/13] arm64: tegra: Bump #address-cells and #size-cells on Tegra186 This was done for Tegra194 and Tegra234 in 2838cfd, but Tegra186 was not part of that change. The same reasoning for that commit also applies to Tegra186, plus keeping the archs as close to each other as possible makes it easier to compare between them and support features concurrently. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250419-tegra186-host1x-addr-size-v1-1-a7493882248d@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 134 +++++++++++------------ 1 file changed, 67 insertions(+), 67 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index f0c9295f55e7..ff88a905ee2a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -124,28 +124,28 @@ aconnect@2900000 { <&bpmp TEGRA186_CLK_APB2APE>; clock-names = "ape", "apb2ape"; power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x02900000 0x0 0x02900000 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x02900000 0x0 0x02900000 0x0 0x200000>; status = "disabled"; tegra_ahub: ahub@2900800 { compatible = "nvidia,tegra186-ahub"; - reg = <0x02900800 0x800>; + reg = <0x0 0x02900800 0x0 0x800>; clocks = <&bpmp TEGRA186_CLK_AHUB>; clock-names = "ahub"; assigned-clocks = <&bpmp TEGRA186_CLK_AHUB>; assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>; assigned-clock-rates = <81600000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x02900800 0x02900800 0x11800>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x02900800 0x0 0x02900800 0x0 0x11800>; status = "disabled"; tegra_i2s1: i2s@2901000 { compatible = "nvidia,tegra186-i2s", "nvidia,tegra210-i2s"; - reg = <0x2901000 0x100>; + reg = <0x0 0x2901000 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_I2S1>, <&bpmp TEGRA186_CLK_I2S1_SYNC_INPUT>; clock-names = "i2s", "sync_input"; @@ -159,7 +159,7 @@ tegra_i2s1: i2s@2901000 { tegra_i2s2: i2s@2901100 { compatible = "nvidia,tegra186-i2s", "nvidia,tegra210-i2s"; - reg = <0x2901100 0x100>; + reg = <0x0 0x2901100 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_I2S2>, <&bpmp TEGRA186_CLK_I2S2_SYNC_INPUT>; clock-names = "i2s", "sync_input"; @@ -173,7 +173,7 @@ tegra_i2s2: i2s@2901100 { tegra_i2s3: i2s@2901200 { compatible = "nvidia,tegra186-i2s", "nvidia,tegra210-i2s"; - reg = <0x2901200 0x100>; + reg = <0x0 0x2901200 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_I2S3>, <&bpmp TEGRA186_CLK_I2S3_SYNC_INPUT>; clock-names = "i2s", "sync_input"; @@ -187,7 +187,7 @@ tegra_i2s3: i2s@2901200 { tegra_i2s4: i2s@2901300 { compatible = "nvidia,tegra186-i2s", "nvidia,tegra210-i2s"; - reg = <0x2901300 0x100>; + reg = <0x0 0x2901300 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_I2S4>, <&bpmp TEGRA186_CLK_I2S4_SYNC_INPUT>; clock-names = "i2s", "sync_input"; @@ -201,7 +201,7 @@ tegra_i2s4: i2s@2901300 { tegra_i2s5: i2s@2901400 { compatible = "nvidia,tegra186-i2s", "nvidia,tegra210-i2s"; - reg = <0x2901400 0x100>; + reg = <0x0 0x2901400 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_I2S5>, <&bpmp TEGRA186_CLK_I2S5_SYNC_INPUT>; clock-names = "i2s", "sync_input"; @@ -215,7 +215,7 @@ tegra_i2s5: i2s@2901400 { tegra_i2s6: i2s@2901500 { compatible = "nvidia,tegra186-i2s", "nvidia,tegra210-i2s"; - reg = <0x2901500 0x100>; + reg = <0x0 0x2901500 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_I2S6>, <&bpmp TEGRA186_CLK_I2S6_SYNC_INPUT>; clock-names = "i2s", "sync_input"; @@ -229,7 +229,7 @@ tegra_i2s6: i2s@2901500 { tegra_sfc1: sfc@2902000 { compatible = "nvidia,tegra186-sfc", "nvidia,tegra210-sfc"; - reg = <0x2902000 0x200>; + reg = <0x0 0x2902000 0x0 0x200>; sound-name-prefix = "SFC1"; status = "disabled"; }; @@ -237,7 +237,7 @@ tegra_sfc1: sfc@2902000 { tegra_sfc2: sfc@2902200 { compatible = "nvidia,tegra186-sfc", "nvidia,tegra210-sfc"; - reg = <0x2902200 0x200>; + reg = <0x0 0x2902200 0x0 0x200>; sound-name-prefix = "SFC2"; status = "disabled"; }; @@ -245,7 +245,7 @@ tegra_sfc2: sfc@2902200 { tegra_sfc3: sfc@2902400 { compatible = "nvidia,tegra186-sfc", "nvidia,tegra210-sfc"; - reg = <0x2902400 0x200>; + reg = <0x0 0x2902400 0x0 0x200>; sound-name-prefix = "SFC3"; status = "disabled"; }; @@ -253,7 +253,7 @@ tegra_sfc3: sfc@2902400 { tegra_sfc4: sfc@2902600 { compatible = "nvidia,tegra186-sfc", "nvidia,tegra210-sfc"; - reg = <0x2902600 0x200>; + reg = <0x0 0x2902600 0x0 0x200>; sound-name-prefix = "SFC4"; status = "disabled"; }; @@ -261,7 +261,7 @@ tegra_sfc4: sfc@2902600 { tegra_amx1: amx@2903000 { compatible = "nvidia,tegra186-amx", "nvidia,tegra210-amx"; - reg = <0x2903000 0x100>; + reg = <0x0 0x2903000 0x0 0x100>; sound-name-prefix = "AMX1"; status = "disabled"; }; @@ -269,7 +269,7 @@ tegra_amx1: amx@2903000 { tegra_amx2: amx@2903100 { compatible = "nvidia,tegra186-amx", "nvidia,tegra210-amx"; - reg = <0x2903100 0x100>; + reg = <0x0 0x2903100 0x0 0x100>; sound-name-prefix = "AMX2"; status = "disabled"; }; @@ -277,7 +277,7 @@ tegra_amx2: amx@2903100 { tegra_amx3: amx@2903200 { compatible = "nvidia,tegra186-amx", "nvidia,tegra210-amx"; - reg = <0x2903200 0x100>; + reg = <0x0 0x2903200 0x0 0x100>; sound-name-prefix = "AMX3"; status = "disabled"; }; @@ -285,7 +285,7 @@ tegra_amx3: amx@2903200 { tegra_amx4: amx@2903300 { compatible = "nvidia,tegra186-amx", "nvidia,tegra210-amx"; - reg = <0x2903300 0x100>; + reg = <0x0 0x2903300 0x0 0x100>; sound-name-prefix = "AMX4"; status = "disabled"; }; @@ -293,7 +293,7 @@ tegra_amx4: amx@2903300 { tegra_adx1: adx@2903800 { compatible = "nvidia,tegra186-adx", "nvidia,tegra210-adx"; - reg = <0x2903800 0x100>; + reg = <0x0 0x2903800 0x0 0x100>; sound-name-prefix = "ADX1"; status = "disabled"; }; @@ -301,7 +301,7 @@ tegra_adx1: adx@2903800 { tegra_adx2: adx@2903900 { compatible = "nvidia,tegra186-adx", "nvidia,tegra210-adx"; - reg = <0x2903900 0x100>; + reg = <0x0 0x2903900 0x0 0x100>; sound-name-prefix = "ADX2"; status = "disabled"; }; @@ -309,7 +309,7 @@ tegra_adx2: adx@2903900 { tegra_adx3: adx@2903a00 { compatible = "nvidia,tegra186-adx", "nvidia,tegra210-adx"; - reg = <0x2903a00 0x100>; + reg = <0x0 0x2903a00 0x0 0x100>; sound-name-prefix = "ADX3"; status = "disabled"; }; @@ -317,14 +317,14 @@ tegra_adx3: adx@2903a00 { tegra_adx4: adx@2903b00 { compatible = "nvidia,tegra186-adx", "nvidia,tegra210-adx"; - reg = <0x2903b00 0x100>; + reg = <0x0 0x2903b00 0x0 0x100>; sound-name-prefix = "ADX4"; status = "disabled"; }; tegra_dmic1: dmic@2904000 { compatible = "nvidia,tegra210-dmic"; - reg = <0x2904000 0x100>; + reg = <0x0 0x2904000 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_DMIC1>; clock-names = "dmic"; assigned-clocks = <&bpmp TEGRA186_CLK_DMIC1>; @@ -336,7 +336,7 @@ tegra_dmic1: dmic@2904000 { tegra_dmic2: dmic@2904100 { compatible = "nvidia,tegra210-dmic"; - reg = <0x2904100 0x100>; + reg = <0x0 0x2904100 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_DMIC2>; clock-names = "dmic"; assigned-clocks = <&bpmp TEGRA186_CLK_DMIC2>; @@ -348,7 +348,7 @@ tegra_dmic2: dmic@2904100 { tegra_dmic3: dmic@2904200 { compatible = "nvidia,tegra210-dmic"; - reg = <0x2904200 0x100>; + reg = <0x0 0x2904200 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_DMIC3>; clock-names = "dmic"; assigned-clocks = <&bpmp TEGRA186_CLK_DMIC3>; @@ -360,7 +360,7 @@ tegra_dmic3: dmic@2904200 { tegra_dmic4: dmic@2904300 { compatible = "nvidia,tegra210-dmic"; - reg = <0x2904300 0x100>; + reg = <0x0 0x2904300 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_DMIC4>; clock-names = "dmic"; assigned-clocks = <&bpmp TEGRA186_CLK_DMIC4>; @@ -372,7 +372,7 @@ tegra_dmic4: dmic@2904300 { tegra_dspk1: dspk@2905000 { compatible = "nvidia,tegra186-dspk"; - reg = <0x2905000 0x100>; + reg = <0x0 0x2905000 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_DSPK1>; clock-names = "dspk"; assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>; @@ -384,7 +384,7 @@ tegra_dspk1: dspk@2905000 { tegra_dspk2: dspk@2905100 { compatible = "nvidia,tegra186-dspk"; - reg = <0x2905100 0x100>; + reg = <0x0 0x2905100 0x0 0x100>; clocks = <&bpmp TEGRA186_CLK_DSPK2>; clock-names = "dspk"; assigned-clocks = <&bpmp TEGRA186_CLK_DSPK2>; @@ -397,9 +397,9 @@ tegra_dspk2: dspk@2905100 { tegra_ope1: processing-engine@2908000 { compatible = "nvidia,tegra186-ope", "nvidia,tegra210-ope"; - reg = <0x2908000 0x100>; - #address-cells = <1>; - #size-cells = <1>; + reg = <0x0 0x2908000 0x0 0x100>; + #address-cells = <2>; + #size-cells = <2>; ranges; sound-name-prefix = "OPE1"; status = "disabled"; @@ -407,20 +407,20 @@ tegra_ope1: processing-engine@2908000 { equalizer@2908100 { compatible = "nvidia,tegra186-peq", "nvidia,tegra210-peq"; - reg = <0x2908100 0x100>; + reg = <0x0 0x2908100 0x0 0x100>; }; dynamic-range-compressor@2908200 { compatible = "nvidia,tegra186-mbdrc", "nvidia,tegra210-mbdrc"; - reg = <0x2908200 0x200>; + reg = <0x0 0x2908200 0x0 0x200>; }; }; tegra_mvc1: mvc@290a000 { compatible = "nvidia,tegra186-mvc", "nvidia,tegra210-mvc"; - reg = <0x290a000 0x200>; + reg = <0x0 0x290a000 0x0 0x200>; sound-name-prefix = "MVC1"; status = "disabled"; }; @@ -428,7 +428,7 @@ tegra_mvc1: mvc@290a000 { tegra_mvc2: mvc@290a200 { compatible = "nvidia,tegra186-mvc", "nvidia,tegra210-mvc"; - reg = <0x290a200 0x200>; + reg = <0x0 0x290a200 0x0 0x200>; sound-name-prefix = "MVC2"; status = "disabled"; }; @@ -436,14 +436,14 @@ tegra_mvc2: mvc@290a200 { tegra_amixer: amixer@290bb00 { compatible = "nvidia,tegra186-amixer", "nvidia,tegra210-amixer"; - reg = <0x290bb00 0x800>; + reg = <0x0 0x290bb00 0x0 0x800>; sound-name-prefix = "MIXER1"; status = "disabled"; }; tegra_admaif: admaif@290f000 { compatible = "nvidia,tegra186-admaif"; - reg = <0x0290f000 0x1000>; + reg = <0x0 0x0290f000 0x0 0x1000>; dmas = <&adma 1>, <&adma 1>, <&adma 2>, <&adma 2>, <&adma 3>, <&adma 3>, @@ -489,7 +489,7 @@ tegra_admaif: admaif@290f000 { tegra_asrc: asrc@2910000 { compatible = "nvidia,tegra186-asrc"; - reg = <0x2910000 0x2000>; + reg = <0x0 0x2910000 0x0 0x2000>; sound-name-prefix = "ASRC1"; status = "disabled"; }; @@ -497,7 +497,7 @@ tegra_asrc: asrc@2910000 { adma: dma-controller@2930000 { compatible = "nvidia,tegra186-adma"; - reg = <0x02930000 0x20000>; + reg = <0x0 0x02930000 0x0 0x20000>; interrupt-parent = <&agic>; interrupts = , , @@ -542,8 +542,8 @@ agic: interrupt-controller@2a40000 { "nvidia,tegra210-agic"; #interrupt-cells = <3>; interrupt-controller; - reg = <0x02a41000 0x1000>, - <0x02a42000 0x2000>; + reg = <0x0 0x02a41000 0x0 0x1000>, + <0x0 0x02a42000 0x0 0x2000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_APE>; @@ -1513,10 +1513,10 @@ host1x@13e00000 { resets = <&bpmp TEGRA186_RESET_HOST1X>; reset-names = "host1x"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; - ranges = <0x15000000 0x0 0x15000000 0x01000000>; + ranges = <0x0 0x15000000 0x0 0x15000000 0x0 0x01000000>; interconnects = <&mc TEGRA186_MEMORY_CLIENT_HOST1XDMAR &emc>; interconnect-names = "dma-mem"; @@ -1535,7 +1535,7 @@ host1x@13e00000 { dpaux1: dpaux@15040000 { compatible = "nvidia,tegra186-dpaux"; - reg = <0x15040000 0x10000>; + reg = <0x0 0x15040000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_DPAUX1>, <&bpmp TEGRA186_CLK_PLLDP>; @@ -1569,7 +1569,7 @@ i2c-bus { display-hub@15200000 { compatible = "nvidia,tegra186-display"; - reg = <0x15200000 0x00040000>; + reg = <0x0 0x15200000 0x0 0x00040000>; resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_MISC>, <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0>, <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1>, @@ -1587,14 +1587,14 @@ display-hub@15200000 { power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; - ranges = <0x15200000 0x15200000 0x40000>; + ranges = <0x0 0x15200000 0x0 0x15200000 0x0 0x40000>; display@15200000 { compatible = "nvidia,tegra186-dc"; - reg = <0x15200000 0x10000>; + reg = <0x0 0x15200000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P0>; clock-names = "dc"; @@ -1613,7 +1613,7 @@ display@15200000 { display@15210000 { compatible = "nvidia,tegra186-dc"; - reg = <0x15210000 0x10000>; + reg = <0x0 0x15210000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P1>; clock-names = "dc"; @@ -1632,7 +1632,7 @@ display@15210000 { display@15220000 { compatible = "nvidia,tegra186-dc"; - reg = <0x15220000 0x10000>; + reg = <0x0 0x15220000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P2>; clock-names = "dc"; @@ -1652,7 +1652,7 @@ display@15220000 { dsia: dsi@15300000 { compatible = "nvidia,tegra186-dsi"; - reg = <0x15300000 0x10000>; + reg = <0x0 0x15300000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_DSI>, <&bpmp TEGRA186_CLK_DSIA_LP>, @@ -1667,7 +1667,7 @@ dsia: dsi@15300000 { vic@15340000 { compatible = "nvidia,tegra186-vic"; - reg = <0x15340000 0x40000>; + reg = <0x0 0x15340000 0x0 0x40000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_VIC>; clock-names = "vic"; @@ -1683,7 +1683,7 @@ vic@15340000 { nvjpg@15380000 { compatible = "nvidia,tegra186-nvjpg"; - reg = <0x15380000 0x40000>; + reg = <0x0 0x15380000 0x0 0x40000>; clocks = <&bpmp TEGRA186_CLK_NVJPG>; clock-names = "nvjpg"; resets = <&bpmp TEGRA186_RESET_NVJPG>; @@ -1698,7 +1698,7 @@ nvjpg@15380000 { dsib: dsi@15400000 { compatible = "nvidia,tegra186-dsi"; - reg = <0x15400000 0x10000>; + reg = <0x0 0x15400000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_DSIB>, <&bpmp TEGRA186_CLK_DSIB_LP>, @@ -1713,7 +1713,7 @@ dsib: dsi@15400000 { nvdec@15480000 { compatible = "nvidia,tegra186-nvdec"; - reg = <0x15480000 0x40000>; + reg = <0x0 0x15480000 0x0 0x40000>; clocks = <&bpmp TEGRA186_CLK_NVDEC>; clock-names = "nvdec"; resets = <&bpmp TEGRA186_RESET_NVDEC>; @@ -1729,7 +1729,7 @@ nvdec@15480000 { nvenc@154c0000 { compatible = "nvidia,tegra186-nvenc"; - reg = <0x154c0000 0x40000>; + reg = <0x0 0x154c0000 0x0 0x40000>; clocks = <&bpmp TEGRA186_CLK_NVENC>; clock-names = "nvenc"; resets = <&bpmp TEGRA186_RESET_NVENC>; @@ -1744,7 +1744,7 @@ nvenc@154c0000 { sor0: sor@15540000 { compatible = "nvidia,tegra186-sor"; - reg = <0x15540000 0x10000>; + reg = <0x0 0x15540000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_SOR0>, <&bpmp TEGRA186_CLK_SOR0_OUT>, @@ -1768,7 +1768,7 @@ sor0: sor@15540000 { sor1: sor@15580000 { compatible = "nvidia,tegra186-sor"; - reg = <0x15580000 0x10000>; + reg = <0x0 0x15580000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_SOR1>, <&bpmp TEGRA186_CLK_SOR1_OUT>, @@ -1792,7 +1792,7 @@ sor1: sor@15580000 { dpaux: dpaux@155c0000 { compatible = "nvidia,tegra186-dpaux"; - reg = <0x155c0000 0x10000>; + reg = <0x0 0x155c0000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_DPAUX>, <&bpmp TEGRA186_CLK_PLLDP>; @@ -1826,7 +1826,7 @@ i2c-bus { padctl@15880000 { compatible = "nvidia,tegra186-dsi-padctl"; - reg = <0x15880000 0x10000>; + reg = <0x0 0x15880000 0x0 0x10000>; resets = <&bpmp TEGRA186_RESET_DSI>; reset-names = "dsi"; status = "disabled"; @@ -1834,7 +1834,7 @@ padctl@15880000 { dsic: dsi@15900000 { compatible = "nvidia,tegra186-dsi"; - reg = <0x15900000 0x10000>; + reg = <0x0 0x15900000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_DSIC>, <&bpmp TEGRA186_CLK_DSIC_LP>, @@ -1849,7 +1849,7 @@ dsic: dsi@15900000 { dsid: dsi@15940000 { compatible = "nvidia,tegra186-dsi"; - reg = <0x15940000 0x10000>; + reg = <0x0 0x15940000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_DSID>, <&bpmp TEGRA186_CLK_DSID_LP>, From dfb25484bd73c8590954ead6fd58a1587ba3bbc5 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 20 Apr 2025 09:35:37 -0500 Subject: [PATCH 10/13] arm64: tegra: Add uartd serial alias for Jetson TX1 module If a serial-tegra interface does not have an alias, the driver fails to probe with an error: serial-tegra 70006300.serial: failed to get alias id, errno -19 This prevents the bluetooth device from being accessible. Fixes: 6eba6471bbb7 ("arm64: tegra: Wire up Bluetooth on Jetson TX1 module") Signed-off-by: Aaron Kling Reviewed-by: Tomasz Maciej Nowak Link: https://lore.kernel.org/r/20250420-tx1-bt-v1-1-153cba105a4e@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi index c57bd1356381..e07aeeee3586 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi @@ -11,6 +11,7 @@ aliases { rtc0 = "/i2c@7000d000/pmic@3c"; rtc1 = "/rtc@7000e000"; serial0 = &uarta; + serial3 = &uartd; }; chosen { From 34ff0bfda6f2960d8b897ef5c39af666a5fb63a0 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 13 Apr 2025 14:35:33 -0500 Subject: [PATCH 11/13] arm64: tegra: Add fallback CEC compatibles The tegra_cec driver only declares support up to Tegra210 and will not declare support for Tegra186 or Tegra194. Thus list a fallback compatible for these chips to tegra210-cec as they work as-is with the existing driver. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250413-tegra-cec-v4-2-b6337b66ccad@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 2 +- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index ff88a905ee2a..5778c93af3e6 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1185,7 +1185,7 @@ gic: interrupt-controller@3881000 { }; cec@3960000 { - compatible = "nvidia,tegra186-cec"; + compatible = "nvidia,tegra186-cec", "nvidia,tegra210-cec"; reg = <0x0 0x03960000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_CEC>; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 3a4e086dcc8c..1399342f23e1 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1343,7 +1343,7 @@ gic: interrupt-controller@3881000 { }; cec@3960000 { - compatible = "nvidia,tegra194-cec"; + compatible = "nvidia,tegra194-cec", "nvidia,tegra210-cec"; reg = <0x0 0x03960000 0x0 0x10000>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_CEC>; From e0f863036a8d0a333112866646513015f1ebb6eb Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 13 Apr 2025 14:35:34 -0500 Subject: [PATCH 12/13] arm64: tegra: Add CEC controller on Tegra210 The CEC controller found on Tegra210 can be used to control consumer devices using the HDMI CEC pin. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250413-tegra-cec-v4-3-b6337b66ccad@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index b6c84d195c0e..402b0ede1472 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -959,6 +959,15 @@ fuse@7000f800 { reset-names = "fuse"; }; + cec@70015000 { + compatible = "nvidia,tegra210-cec"; + reg = <0x0 0x070015000 0x0 0x1000>; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_CEC>; + clock-names = "cec"; + status = "disabled"; + }; + mc: memory-controller@70019000 { compatible = "nvidia,tegra210-mc"; reg = <0x0 0x70019000 0x0 0x1000>; From 20440c7f9015a140e090c625d98b7fb086e7b63c Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 13 Apr 2025 14:35:35 -0500 Subject: [PATCH 13/13] arm64: tegra: Wire up CEC to devkits This enables HDMI CEC and routes it to the HDMI port on all supported Tegra210, Tegra186, and Tegra194 devkits. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250413-tegra-cec-v4-4-b6337b66ccad@gmail.com Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 6 ++++++ .../boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts | 6 ++++++ arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 6 ++++++ arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi | 6 ++++++ arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 6 ++++++ arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 6 ++++++ 6 files changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index a50fd205daa8..8b3736cee323 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -2394,6 +2394,12 @@ usb@3550000 { phy-names = "usb2-0"; }; + cec@3960000 { + status = "okay"; + + hdmi-phandle = <&sor1>; + }; + i2c@c250000 { /* carrier board ID EEPROM */ eeprom@57 { diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts b/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts index 4ab66ebd874d..5f3f572ecea9 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts @@ -714,6 +714,12 @@ usb@3550000 { phy-names = "usb2-0"; }; + cec@3960000 { + status = "okay"; + + hdmi-phandle = <&sor1>; + }; + hsp@3c00000 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts index c32876699a43..ea6f397a2792 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts @@ -2121,6 +2121,12 @@ usb@3610000 { phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3"; }; + cec@3960000 { + status = "okay"; + + hdmi-phandle = <&sor2>; + }; + i2c@c240000 { typec@8 { compatible = "cypress,cypd4226"; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi index 4a17ea5e40fd..16cf4414de59 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi @@ -2174,6 +2174,12 @@ usb@3610000 { phy-names = "usb2-1", "usb2-2", "usb3-2"; }; + cec@3960000 { + status = "okay"; + + hdmi-phandle = <&sor1>; + }; + host1x@13e00000 { display-hub@15200000 { status = "okay"; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index a6a58e51822d..627abf51a5a4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -90,6 +90,12 @@ eeprom@57 { }; }; + cec@70015000 { + status = "okay"; + + hdmi-phandle = <&sor1>; + }; + clock@70110000 { status = "okay"; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts index 0ecdd7243b2e..ec0e84cb83ef 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts @@ -419,6 +419,12 @@ pmc@7000e400 { nvidia,sys-clock-req-active-high; }; + cec@70015000 { + status = "okay"; + + hdmi-phandle = <&sor1>; + }; + hda@70030000 { nvidia,model = "NVIDIA Jetson Nano HDA";