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arm64: dts: rockchip: get vad audio buffer from sram node

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Change-Id: Ib1583475d3de57ed6ac69153519057a999feb0a0
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
This commit is contained in:
Sugar Zhang 2018-09-25 19:50:46 +08:00
parent 2a60fe4c97
commit 937cd237b3
2 changed files with 38 additions and 5 deletions
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22
arch/arm64/boot/dts/rockchip/rk1808.dtsi
View File

@ -242,6 +242,22 @@ qos_vpu: qos@fe8cc000 {
reg = <0x0 0xfe8c000 0x0 0x20>;
};
sram: sram@fec00000 {
compatible = "mmio-sram";
reg = <0x0 0xfec00000 0x0 0x200000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0xfec00000 0x200000>;
/* reserved for ddr dvfs and system suspend/resume */
ddr-sram@0 {
reg = <0x0 0x8000>;
};
/* reserved for vad audio buffer */
vad_sram: vad-sram@1c0000 {
reg = <0x1c0000 0x40000>;
};
};
gic: interrupt-controller@ff100000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
@ -906,12 +922,12 @@ &pdm_sdi2
vad: vad@ff810000 {
compatible = "rockchip,rk1808-vad";
/* vad buf: last 256 KB system sram */
reg = <0x0 0xff810000 0x0 0x10000>, <0x0 0xfedc0000 0x0 0x40000>;
reg-names = "vad", "vad-memory";
reg = <0x0 0xff810000 0x0 0x10000>;
reg-names = "vad";
clocks = <&cru HCLK_VAD>;
clock-names = "hclk";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
rockchip,audio-sram = <&vad_sram>;
rockchip,audio-src = <0>;
rockchip,det-channel = <0>;
rockchip,mode = <1>;

21
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View File

@ -1091,11 +1091,12 @@ spdif_rx: spdif-rx@ff3b0000 {
vad: vad@ff3c0000 {
compatible = "rockchip,rk3308-vad";
reg = <0x0 0xff3c0000 0x0 0x10000>, <0x0 0xfff88000 0x0 0x38000>;
reg-names = "vad", "vad-memory";
reg = <0x0 0xff3c0000 0x0 0x10000>;
reg-names = "vad";
clocks = <&cru HCLK_VAD>;
clock-names = "hclk";
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
rockchip,audio-sram = <&vad_sram>;
rockchip,audio-src = <0>;
rockchip,det-channel = <0>;
rockchip,mode = <0>;
@ -1270,6 +1271,22 @@ gic: interrupt-controller@ff580000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
sram: sram@fff80000 {
compatible = "mmio-sram";
reg = <0x0 0xfff80000 0x0 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0xfff80000 0x40000>;
/* reserved for ddr dvfs and system suspend/resume */
ddr-sram@0 {
reg = <0x0 0x8000>;
};
/* reserved for vad audio buffer */
vad_sram: vad-sram@8000 {
reg = <0x8000 0x38000>;
};
};
pinctrl: pinctrl {
compatible = "rockchip,rk3308-pinctrl";
rockchip,grf = <&grf>;