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Merge branch 'pci/controller/dwc'
- Fall back to allocating 64-bit MSI DMA address if unable to allocate a 32-bit address (Ajay Agarwal) * pci/controller/dwc: PCI: dwc: endpoint: Fix advertised resizable BAR size PCI: dwc: Strengthen the MSI address allocation logic
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commit
92a1d9b877
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@ -627,8 +627,13 @@ int dw_pcie_ep_init_complete(struct dw_pcie_ep *ep)
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nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
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PCI_REBAR_CTRL_NBAR_SHIFT;
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/*
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* PCIe r6.0, sec 7.8.6.2 require us to support at least one
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* size in the range from 1 MB to 512 GB. Advertise support
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* for 1 MB BAR size only.
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*/
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for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
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dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);
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dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4));
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}
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/*
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@ -328,7 +328,7 @@ static int dw_pcie_msi_host_init(struct dw_pcie_rp *pp)
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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struct device *dev = pci->dev;
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struct platform_device *pdev = to_platform_device(dev);
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u64 *msi_vaddr;
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u64 *msi_vaddr = NULL;
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int ret;
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u32 ctrl, num_ctrls;
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@ -379,15 +379,20 @@ static int dw_pcie_msi_host_init(struct dw_pcie_rp *pp)
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* memory.
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*/
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ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
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if (ret)
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dev_warn(dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n");
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if (!ret)
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msi_vaddr = dmam_alloc_coherent(dev, sizeof(u64), &pp->msi_data,
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GFP_KERNEL);
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msi_vaddr = dmam_alloc_coherent(dev, sizeof(u64), &pp->msi_data,
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GFP_KERNEL);
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if (!msi_vaddr) {
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dev_err(dev, "Failed to alloc and map MSI data\n");
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dw_pcie_free_msi(pp);
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return -ENOMEM;
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dev_warn(dev, "Failed to allocate 32-bit MSI address\n");
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dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
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msi_vaddr = dmam_alloc_coherent(dev, sizeof(u64), &pp->msi_data,
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GFP_KERNEL);
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if (!msi_vaddr) {
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dev_err(dev, "Failed to allocate MSI address\n");
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dw_pcie_free_msi(pp);
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return -ENOMEM;
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}
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}
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return 0;
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