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ASoC: rsnd: Add ADG reset support for RZ/G3E
RZ/G3E requires the ADG reset line to be deasserted for the audio subsystem to operate. The ADG module clock is already managed via rsnd_adg_clk_enable/disable() through adg->adg, so no additional clock handling is needed. Add support for the optional "adg" reset control on Renesas RZ/G3E SoC. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/20260525110230.4014435-13-john.madieu.xa@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -771,6 +771,7 @@ void rsnd_adg_clk_dbg_info(struct rsnd_priv *priv, struct seq_file *m)
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int rsnd_adg_probe(struct rsnd_priv *priv)
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{
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struct reset_control *rstc;
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struct rsnd_adg *adg;
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struct device *dev = rsnd_priv_to_dev(priv);
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int ret;
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@ -779,8 +780,11 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
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if (!adg)
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return -ENOMEM;
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ret = rsnd_mod_init(priv, &adg->mod, &adg_ops,
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NULL, NULL, 0, 0);
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rstc = devm_reset_control_get_optional_exclusive(dev, "adg");
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if (IS_ERR(rstc))
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return dev_err_probe(dev, PTR_ERR(rstc), "failed to get adg reset\n");
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ret = rsnd_mod_init(priv, &adg->mod, &adg_ops, NULL, rstc, 0, 0);
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if (ret)
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return ret;
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