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arm64: dts: qcom: qcs8300-ride: Enable PMIC peripherals
Enable PMIC and PMIC peripherals for qcs8300-ride board. The qcs8 300-ride uses 2 pmics(pmm8620au:0,pmm8650au:1) on the board, which are variants of pmm8654au used on sa8775p/qcs9100 -ride(4x pmics). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com> Link: https://lore.kernel.org/r/20250108-adds-spmi-pmic-peripherals-for-qcs8300-v3-2-ee94642279ff@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi
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51
arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi
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@ -0,0 +1,51 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/spmi/spmi.h>
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&spmi_bus {
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pmm8620au_0: pmic@0 {
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compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8620au_0_rtc: rtc@6100 {
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compatible = "qcom,pmk8350-rtc";
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reg = <0x6100>, <0x6200>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
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allow-set-time;
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};
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pmm8620au_0_gpios: gpio@8800 {
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compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
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reg = <0x8800>;
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gpio-controller;
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gpio-ranges = <&pmm8620au_0_gpios 0 0 12>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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pmm8650au_1: pmic@2 {
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compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
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reg = <0x2 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8650au_1_gpios: gpio@8800 {
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compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
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reg = <0x8800>;
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gpio-controller;
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gpio-ranges = <&pmm8650au_1_gpios 0 0 12>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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};
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@ -9,6 +9,7 @@
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#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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#include "qcs8300.dtsi"
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#include "qcs8300-pmics.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. QCS8300 Ride";
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compatible = "qcom,qcs8300-ride", "qcom,qcs8300";
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