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net/mlx5: Map SF controller to pfnum for satellite PFs

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SF devlink port creation and registration used the ECPF's PCI function
as pfnum. Extend this to support satellite PF controllers by introducing
mlx5_esw_sf_controller_to_pfnum() that maps a controller number to the
corresponding PF number, and use it in SF port attribute setup and SF
creation validation.

Reorder the checks in mlx5_devlink_sf_port_new() so that
mlx5_sf_table_supported() runs before attribute validation, since the
new helper requires the eswitch to be initialized.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-8-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Moshe Shemesh 2026-05-21 14:08:38 +03:00 committed by Jakub Kicinski
parent 0b43d2b76c
commit 90a6aabb74
4 changed files with 28 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
View File

@ -125,7 +125,7 @@ static void mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch *esw
struct netdev_phys_item_id ppid = {};
u16 pfnum;
pfnum = PCI_FUNC(dev->pdev->devfn);
pfnum = mlx5_esw_sf_controller_to_pfnum(dev, controller);
mlx5_esw_get_port_parent_id(dev, &ppid);
memcpy(dl_port->attrs.switch_id.id, &ppid.id[0], ppid.id_len);
dl_port->attrs.switch_id.id_len = ppid.id_len;

17
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
View File

@ -2150,6 +2150,23 @@ u16 mlx5_esw_get_hpf_pf_num(struct mlx5_core_dev *dev)
return PCI_FUNC(dev->pdev->devfn);
}
u16 mlx5_esw_sf_controller_to_pfnum(struct mlx5_core_dev *dev, u32 controller)
{
struct mlx5_eswitch *esw = dev->priv.eswitch;
struct mlx5_esw_functions *esw_funcs;
int i;
if (!controller)
return PCI_FUNC(dev->pdev->devfn);
esw_funcs = &esw->esw_funcs;
for (i = 0; i < esw_funcs->num_spfs; i++)
if (controller == esw_funcs->spfs[i].host_number + 1)
return esw_funcs->spfs[i].pf_num;
return mlx5_esw_get_hpf_pf_num(dev);
}
bool mlx5_esw_has_spf_sfs(struct mlx5_core_dev *dev)
{
struct mlx5_eswitch *esw = dev->priv.eswitch;

1
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
View File

@ -892,6 +892,7 @@ int mlx5_esw_spf_get_host_number(struct mlx5_core_dev *dev, int spf_idx,
u16 *host_number);
u16 mlx5_esw_get_hpf_host_number(struct mlx5_core_dev *dev);
u16 mlx5_esw_get_hpf_pf_num(struct mlx5_core_dev *dev);
u16 mlx5_esw_sf_controller_to_pfnum(struct mlx5_core_dev *dev, u32 controller);
bool mlx5_esw_has_spf_sfs(struct mlx5_core_dev *dev);
int mlx5_esw_vport_vhca_id_map(struct mlx5_eswitch *esw,

14
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
View File

@ -265,6 +265,8 @@ static int
mlx5_sf_new_check_attr(struct mlx5_core_dev *dev, const struct devlink_port_new_attrs *new_attr,
struct netlink_ext_ack *extack)
{
u32 controller;
if (new_attr->flavour != DEVLINK_PORT_FLAVOUR_PCI_SF) {
NL_SET_ERR_MSG_MOD(extack, "Driver supports only SF port addition");
return -EOPNOTSUPP;
@ -284,7 +286,9 @@ mlx5_sf_new_check_attr(struct mlx5_core_dev *dev, const struct devlink_port_new_
NL_SET_ERR_MSG_MOD(extack, "External controller is unsupported");
return -EOPNOTSUPP;
}
if (new_attr->pfnum != PCI_FUNC(dev->pdev->devfn)) {
controller = new_attr->controller_valid ? new_attr->controller : 0;
if (new_attr->pfnum !=
mlx5_esw_sf_controller_to_pfnum(dev, controller)) {
NL_SET_ERR_MSG_MOD(extack, "Invalid pfnum supplied");
return -EOPNOTSUPP;
}
@ -306,10 +310,6 @@ int mlx5_devlink_sf_port_new(struct devlink *devlink,
struct mlx5_sf_table *table = dev->priv.sf_table;
int err;
err = mlx5_sf_new_check_attr(dev, new_attr, extack);
if (err)
return err;
if (!mlx5_sf_table_supported(dev)) {
NL_SET_ERR_MSG_MOD(extack, "SF ports are not supported.");
return -EOPNOTSUPP;
@ -321,6 +321,10 @@ int mlx5_devlink_sf_port_new(struct devlink *devlink,
return -EOPNOTSUPP;
}
err = mlx5_sf_new_check_attr(dev, new_attr, extack);
if (err)
return err;
return mlx5_sf_add(dev, table, new_attr, extack, dl_port);
}