drm/rockchip: vop2: fix hactive 4-pixel alignment in mode_fixup

For RK3588 and RK3568, the hactive of video timing must
be 4-pixel aligned.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I2485e27420b365104c5c876708600fb59189e1af
This commit is contained in:
Damon Ding 2023-04-10 14:31:57 +08:00 committed by Tao Huang
parent ebee330352
commit 907d06745a

View File

@ -6502,11 +6502,32 @@ static bool vop2_crtc_mode_fixup(struct drm_crtc *crtc,
struct drm_display_mode *adj_mode)
{
struct vop2_video_port *vp = to_vop2_video_port(crtc);
struct vop2 *vop2 = vp->vop2;
struct drm_connector *connector;
struct drm_connector_list_iter conn_iter;
struct drm_crtc_state *new_crtc_state = container_of(mode, struct drm_crtc_state, mode);
struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(new_crtc_state);
/*
* For RK3568 and RK3588, the hactive of video timing must
* be 4-pixel aligned.
*/
if (vop2->version == VOP_VERSION_RK3568 || vop2->version == VOP_VERSION_RK3588) {
if (adj_mode->hdisplay % 4) {
u16 old_hdisplay = adj_mode->hdisplay;
u16 align;
align = 4 - (adj_mode->hdisplay % 4);
adj_mode->hdisplay += align;
adj_mode->hsync_start += align;
adj_mode->hsync_end += align;
adj_mode->htotal += align;
DRM_WARN("VP%d: hactive need to be aligned with 4-pixel, %d -> %d\n",
vp->id, old_hdisplay, adj_mode->hdisplay);
}
}
drm_mode_set_crtcinfo(adj_mode, CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE);
if (mode->flags & DRM_MODE_FLAG_DBLCLK || vcstate->output_if & VOP_OUTPUT_IF_BT656)