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thermal: intel: Don't set HFI status bit to 1
When CPU doesn't support HFI (Hardware Feedback Interface), don't include
BIT 26 in the mask to prevent clearing. otherwise this results in:
unchecked MSR access error: WRMSR to 0x1b1
(tried to write 0x0000000004000aa8)
at rIP: 0xffffffff8b8559fe (throttle_active_work+0xbe/0x1b0)
Fixes: 6fe1e64b60 ("thermal: intel: Prevent accidental clearing of HFI status")
Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Tested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
parent
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commit
904f309ae7
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@ -194,7 +194,7 @@ static const struct attribute_group thermal_attr_group = {
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#define THERM_STATUS_PROCHOT_LOG BIT(1)
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#define THERM_STATUS_CLEAR_CORE_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(13) | BIT(15))
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#define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(26))
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#define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11))
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/*
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* Clear the bits in package thermal status register for bit = 1
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@ -211,6 +211,9 @@ void thermal_clear_package_intr_status(int level, u64 bit_mask)
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} else {
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msr = MSR_IA32_PACKAGE_THERM_STATUS;
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msr_val = THERM_STATUS_CLEAR_PKG_MASK;
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if (boot_cpu_has(X86_FEATURE_HFI))
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msr_val |= BIT(26);
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}
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msr_val &= ~bit_mask;
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