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mmc: sdhci_am654: Add retry tuning

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Add retry tuning up to 10 times if we fail to find
a failing region or no passing itapdly. This is
necessary since some eMMC has been observed to never
find a failing itapdly on the first couple of tuning
iterations, but eventually does. Keep count of current
tuning iteration using tuning_loop. It has been observed
that the tuning algorithm does not need to loop more
than 10 times before finding a failing itapdly.

Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20240904232512.830778-2-jm@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Judith Mendez 2024-09-04 18:25:11 -05:00 committed by Ulf Hansson
parent 7e856617a1
commit 901d16e462
1 changed files with 35 additions and 12 deletions
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43
drivers/mmc/host/sdhci_am654.c
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@ -86,6 +86,7 @@
#define CLOCK_TOO_SLOW_HZ 50000000 #define CLOCK_TOO_SLOW_HZ 50000000
#define SDHCI_AM654_AUTOSUSPEND_DELAY -1 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
#define RETRY_TUNING_MAX 10
/* Command Queue Host Controller Interface Base address */ /* Command Queue Host Controller Interface Base address */
#define SDHCI_AM654_CQE_BASE_ADDR 0x200 #define SDHCI_AM654_CQE_BASE_ADDR 0x200
@ -151,6 +152,7 @@ struct sdhci_am654_data {
u32 flags; u32 flags;
u32 quirks; u32 quirks;
bool dll_enable; bool dll_enable;
u32 tuning_loop;
#define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0) #define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0)
}; };
@ -443,22 +445,23 @@ static u32 sdhci_am654_cqhci_irq(struct sdhci_host *host, u32 intmask)
#define ITAPDLY_LENGTH 32 #define ITAPDLY_LENGTH 32
#define ITAPDLY_LAST_INDEX (ITAPDLY_LENGTH - 1) #define ITAPDLY_LAST_INDEX (ITAPDLY_LENGTH - 1)
static u32 sdhci_am654_calculate_itap(struct sdhci_host *host, struct window static int sdhci_am654_calculate_itap(struct sdhci_host *host, struct window
*fail_window, u8 num_fails, bool circular_buffer) *fail_window, u8 num_fails, bool circular_buffer)
{ {
u8 itap = 0, start_fail = 0, end_fail = 0, pass_length = 0; u8 itap = 0, start_fail = 0, end_fail = 0, pass_length = 0;
u8 first_fail_start = 0, last_fail_end = 0; u8 first_fail_start = 0, last_fail_end = 0;
struct device *dev = mmc_dev(host->mmc);
struct window pass_window = {0, 0, 0}; struct window pass_window = {0, 0, 0};
int prev_fail_end = -1; int prev_fail_end = -1;
u8 i; u8 i;
if (!num_fails) if (!num_fails) {
return ITAPDLY_LAST_INDEX >> 1; /* Retry tuning */
return -1;
}
if (fail_window->length == ITAPDLY_LENGTH) { if (fail_window->length == ITAPDLY_LENGTH) {
dev_err(dev, "No passing ITAPDLY, return 0\n"); /* Retry tuning */
return 0; return -1;
} }
first_fail_start = fail_window->start; first_fail_start = fail_window->start;
@ -494,7 +497,7 @@ static u32 sdhci_am654_calculate_itap(struct sdhci_host *host, struct window
return (itap > ITAPDLY_LAST_INDEX) ? ITAPDLY_LAST_INDEX >> 1 : itap; return (itap > ITAPDLY_LAST_INDEX) ? ITAPDLY_LAST_INDEX >> 1 : itap;
} }
static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host, static int sdhci_am654_do_tuning(struct sdhci_host *host,
u32 opcode) u32 opcode)
{ {
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@ -532,13 +535,30 @@ static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host,
if (fail_window[fail_index].length != 0) if (fail_window[fail_index].length != 0)
fail_index++; fail_index++;
itap = sdhci_am654_calculate_itap(host, fail_window, fail_index, return sdhci_am654_calculate_itap(host, fail_window, fail_index,
sdhci_am654->dll_enable); sdhci_am654->dll_enable);
}
sdhci_am654_write_itapdly(sdhci_am654, itap, sdhci_am654->itap_del_ena[timing]); static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host,
u32 opcode)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
unsigned char timing = host->mmc->ios.timing;
int itapdly;
do {
itapdly = sdhci_am654_do_tuning(host, opcode);
if (itapdly >= 0)
break;
} while (++sdhci_am654->tuning_loop < RETRY_TUNING_MAX);
if (itapdly < 0)
return -1;
sdhci_am654_write_itapdly(sdhci_am654, itapdly, sdhci_am654->itap_del_ena[timing]);
/* Save ITAPDLY */ /* Save ITAPDLY */
sdhci_am654->itap_del_sel[timing] = itap; sdhci_am654->itap_del_sel[timing] = itapdly;
return 0; return 0;
} }
@ -742,6 +762,9 @@ static int sdhci_am654_init(struct sdhci_host *host)
regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK, regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK,
TUNINGFORSDR50_MASK); TUNINGFORSDR50_MASK);
/* Use to re-execute tuning */
sdhci_am654->tuning_loop = 0;
ret = sdhci_setup_host(host); ret = sdhci_setup_host(host);
if (ret) if (ret)
return ret; return ret;