arm64: dts: mediatek: mt7981b-openwrt-one: Enable PCIe and USB

Enable the PCIe controller and USB3 XHCI host on the OpenWrt One
board. The USB controller is configured for USB 2.0 only mode, as the
shared USB3/PCIe PHY is dedicated to PCIe functionality on this board.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
Sjoerd Simons 2025-12-23 13:37:53 +01:00 committed by AngeloGioacchino Del Regno
parent 262cb81069
commit 8f350dbb2e
No known key found for this signature in database
GPG Key ID: 9A3604CFAD978478

View File

@ -67,9 +67,40 @@ led-2 {
linux,default-trigger = "netdev";
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";
};
&pio {
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_pereset";
};
};
pwm_pins: pwm-pins {
mux {
function = "pwm";
@ -163,3 +194,15 @@ partition@180000 {
&uart0 {
status = "okay";
};
&usb_phy {
status = "okay";
};
&xhci {
phys = <&u2port0 PHY_TYPE_USB2>;
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
mediatek,u3p-dis-msk = <0x01>;
status = "okay";
};