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media: iris: don't specify ubwc_swizzle in the source code

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The UBWC swizzle is specified both in the Iris driver and in the
platform UBWC config. Use the platform UBWC configuration instead of
specifying it directly in the source.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Tested-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2026-01-25 13:30:08 +02:00 committed by Bryan O'Donoghue
parent 68b41e1aae
commit 8f1a4226df
3 changed files with 3 additions and 9 deletions
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6
drivers/media/platform/qcom/iris/iris_hfi_gen2_packet.c
View File

@ -170,7 +170,7 @@ void iris_hfi_gen2_packet_sys_init(struct iris_core *core, struct iris_hfi_heade
&payload,
sizeof(u32));
payload = core->iris_platform_data->ubwc_config->bank_swzl_level;
payload = !!(qcom_ubwc_swizzle(ubwc) & UBWC_SWIZZLE_ENABLE_LVL1);
iris_hfi_gen2_create_packet(hdr,
HFI_PROP_UBWC_BANK_SWZL_LEVEL1,
HFI_HOST_FLAGS_NONE,
@ -180,7 +180,7 @@ void iris_hfi_gen2_packet_sys_init(struct iris_core *core, struct iris_hfi_heade
&payload,
sizeof(u32));
payload = core->iris_platform_data->ubwc_config->bank_swz2_level;
payload = !!(qcom_ubwc_swizzle(ubwc) & UBWC_SWIZZLE_ENABLE_LVL2);
iris_hfi_gen2_create_packet(hdr,
HFI_PROP_UBWC_BANK_SWZL_LEVEL2,
HFI_HOST_FLAGS_NONE,
@ -190,7 +190,7 @@ void iris_hfi_gen2_packet_sys_init(struct iris_core *core, struct iris_hfi_heade
&payload,
sizeof(u32));
payload = core->iris_platform_data->ubwc_config->bank_swz3_level;
payload = !!(qcom_ubwc_swizzle(ubwc) & UBWC_SWIZZLE_ENABLE_LVL3);
iris_hfi_gen2_create_packet(hdr,
HFI_PROP_UBWC_BANK_SWZL_LEVEL3,
HFI_HOST_FLAGS_NONE,

3
drivers/media/platform/qcom/iris/iris_platform_common.h
View File

@ -77,9 +77,6 @@ struct tz_cp_config {
struct ubwc_config_data {
u32 max_channels;
u32 bank_swzl_level;
u32 bank_swz2_level;
u32 bank_swz3_level;
u32 bank_spreading;
};

3
drivers/media/platform/qcom/iris/iris_platform_gen2.c
View File

@ -792,9 +792,6 @@ static const char * const sm8550_opp_clk_table[] = {
static struct ubwc_config_data ubwc_config_sm8550 = {
.max_channels = 8,
.bank_swzl_level = 0,
.bank_swz2_level = 1,
.bank_swz3_level = 1,
.bank_spreading = 1,
};