From 8e9f7797bcdfc95586bd9722e1944b1609d93fa6 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Tue, 29 Dec 2020 12:47:40 +0100 Subject: [PATCH] arm64: dts: lx2160a: use constants in the clockgen phandle Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 92 ++++++++++++------- 1 file changed, 57 insertions(+), 35 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 0d4bce13b8f1..451e4430024c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -4,6 +4,7 @@ // // Copyright 2018-2020 NXP +#include #include #include #include @@ -30,7 +31,7 @@ cpu0: cpu@0 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x0>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -47,7 +48,7 @@ cpu1: cpu@1 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x1>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -64,7 +65,7 @@ cpu100: cpu@100 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x100>; - clocks = <&clockgen 1 1>; + clocks = <&clockgen QORIQ_CLK_CMUX 1>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -81,7 +82,7 @@ cpu101: cpu@101 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x101>; - clocks = <&clockgen 1 1>; + clocks = <&clockgen QORIQ_CLK_CMUX 1>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -98,7 +99,7 @@ cpu200: cpu@200 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x200>; - clocks = <&clockgen 1 2>; + clocks = <&clockgen QORIQ_CLK_CMUX 2>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -115,7 +116,7 @@ cpu201: cpu@201 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x201>; - clocks = <&clockgen 1 2>; + clocks = <&clockgen QORIQ_CLK_CMUX 2>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -132,7 +133,7 @@ cpu300: cpu@300 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x300>; - clocks = <&clockgen 1 3>; + clocks = <&clockgen QORIQ_CLK_CMUX 3>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -149,7 +150,7 @@ cpu301: cpu@301 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x301>; - clocks = <&clockgen 1 3>; + clocks = <&clockgen QORIQ_CLK_CMUX 3>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -166,7 +167,7 @@ cpu400: cpu@400 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x400>; - clocks = <&clockgen 1 4>; + clocks = <&clockgen QORIQ_CLK_CMUX 4>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -183,7 +184,7 @@ cpu401: cpu@401 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x401>; - clocks = <&clockgen 1 4>; + clocks = <&clockgen QORIQ_CLK_CMUX 4>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -200,7 +201,7 @@ cpu500: cpu@500 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x500>; - clocks = <&clockgen 1 5>; + clocks = <&clockgen QORIQ_CLK_CMUX 5>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -217,7 +218,7 @@ cpu501: cpu@501 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x501>; - clocks = <&clockgen 1 5>; + clocks = <&clockgen QORIQ_CLK_CMUX 5>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -234,7 +235,7 @@ cpu600: cpu@600 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x600>; - clocks = <&clockgen 1 6>; + clocks = <&clockgen QORIQ_CLK_CMUX 6>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -251,7 +252,7 @@ cpu601: cpu@601 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x601>; - clocks = <&clockgen 1 6>; + clocks = <&clockgen QORIQ_CLK_CMUX 6>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -268,7 +269,7 @@ cpu700: cpu@700 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x700>; - clocks = <&clockgen 1 7>; + clocks = <&clockgen QORIQ_CLK_CMUX 7>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -285,7 +286,7 @@ cpu701: cpu@701 { compatible = "arm,cortex-a72"; enable-method = "psci"; reg = <0x701>; - clocks = <&clockgen 1 7>; + clocks = <&clockgen QORIQ_CLK_CMUX 7>; d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; @@ -716,7 +717,8 @@ i2c0: i2c@2000000 { reg = <0x0 0x2000000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; scl-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -728,7 +730,8 @@ i2c1: i2c@2010000 { reg = <0x0 0x2010000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; status = "disabled"; }; @@ -739,7 +742,8 @@ i2c2: i2c@2020000 { reg = <0x0 0x2020000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; status = "disabled"; }; @@ -750,7 +754,8 @@ i2c3: i2c@2030000 { reg = <0x0 0x2030000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; status = "disabled"; }; @@ -761,7 +766,8 @@ i2c4: i2c@2040000 { reg = <0x0 0x2040000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; scl-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -773,7 +779,8 @@ i2c5: i2c@2050000 { reg = <0x0 0x2050000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; status = "disabled"; }; @@ -784,7 +791,8 @@ i2c6: i2c@2060000 { reg = <0x0 0x2060000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; status = "disabled"; }; @@ -795,7 +803,8 @@ i2c7: i2c@2070000 { reg = <0x0 0x2070000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&clockgen 4 15>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(16)>; status = "disabled"; }; @@ -807,7 +816,10 @@ fspi: spi@20c0000 { <0x0 0x20000000 0x0 0x10000000>; reg-names = "fspi_base", "fspi_mmap"; interrupts = ; - clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; clock-names = "fspi_en", "fspi"; status = "disabled"; }; @@ -818,7 +830,8 @@ dspi0: spi@2100000 { #size-cells = <0>; reg = <0x0 0x2100000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 7>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(8)>; clock-names = "dspi"; spi-num-chipselects = <5>; bus-num = <0>; @@ -831,7 +844,8 @@ dspi1: spi@2110000 { #size-cells = <0>; reg = <0x0 0x2110000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 7>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(8)>; clock-names = "dspi"; spi-num-chipselects = <5>; bus-num = <1>; @@ -844,7 +858,8 @@ dspi2: spi@2120000 { #size-cells = <0>; reg = <0x0 0x2120000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 7>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(8)>; clock-names = "dspi"; spi-num-chipselects = <5>; bus-num = <2>; @@ -855,7 +870,8 @@ esdhc0: esdhc@2140000 { compatible = "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; interrupts = <0 28 0x4>; /* Level high type */ - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; dma-coherent; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; @@ -868,7 +884,8 @@ esdhc1: esdhc@2150000 { compatible = "fsl,esdhc"; reg = <0x0 0x2150000 0x0 0x10000>; interrupts = <0 63 0x4>; /* Level high type */ - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; dma-coherent; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; @@ -1004,7 +1021,8 @@ sata0: sata@3200000 { <0x7 0x100520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = ; - clocks = <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; dma-coherent; status = "disabled"; }; @@ -1015,7 +1033,8 @@ sata1: sata@3210000 { <0x7 0x100520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = ; - clocks = <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; dma-coherent; status = "disabled"; }; @@ -1026,7 +1045,8 @@ sata2: sata@3220000 { <0x7 0x100520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = ; - clocks = <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; dma-coherent; status = "disabled"; }; @@ -1037,7 +1057,8 @@ sata3: sata@3230000 { <0x7 0x100520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = ; - clocks = <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; dma-coherent; status = "disabled"; }; @@ -1310,7 +1331,8 @@ console@8340020 { ptp-timer@8b95000 { compatible = "fsl,dpaa2-ptp"; reg = <0x0 0x8b95000 0x0 0x100>; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; little-endian; fsl,extts-fifo; };