ARM: dts: imx: Pass a label to the soc node

Pass a label to the 'soc' node to make it easier to reference
it from other devicetree files.

U-Boot, for example usually needs to access the AIPS node to
pass U-Boot-specific properties.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arch/arm/boot/dts/imx25.dtsi

@@ -68,7 +68,7 @@ osc {
 		};
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx27.dtsi

@@ -74,7 +74,7 @@ cpu: cpu@0 {
 		};
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx31.dtsi

@@ -48,7 +48,7 @@ avic: interrupt-controller@68000000 {
 		reg = <0x68000000 0x100000>;
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx50.dtsi

@@ -94,7 +94,7 @@ usbphy0: usbphy-0 {
 		status = "okay";
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx51.dtsi

@@ -114,7 +114,7 @@ display-subsystem {
 		ports = <&ipu_di0>, <&ipu_di1>;
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx53.dtsi

@@ -132,7 +132,7 @@ usbphy1: usbphy-1 {
 		status = "okay";
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx6dl.dtsi

@@ -80,7 +80,7 @@ cpu@1 {
 		};
 	};
 
-	soc {
+	soc: soc {
 		ocram: sram@900000 {
 			compatible = "mmio-sram";
 			reg = <0x00900000 0x20000>;

arch/arm/boot/dts/imx6q.dtsi

@@ -159,7 +159,7 @@ cpu3: cpu@3 {
 		};
 	};
 
-	soc {
+	soc: soc {
 		ocram: sram@900000 {
 			compatible = "mmio-sram";
 			reg = <0x00900000 0x40000>;

arch/arm/boot/dts/imx6qdl.dtsi

@@ -143,7 +143,7 @@ usbphynop2: usbphynop2 {
 		#phy-cells = <0>;
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx6sx.dtsi

@@ -154,7 +154,7 @@ usbphynop1: usbphynop1 {
 		#phy-cells = <0>;
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx6ul.dtsi

@@ -137,7 +137,7 @@ pmu {
 		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";

arch/arm/boot/dts/imx6ull.dtsi

@@ -50,7 +50,7 @@ &usdhc2 {
 };
 
 / {
-	soc {
+	soc: soc {
 		aips3: bus@2200000 {
 			compatible = "fsl,aips-bus", "simple-bus";
 			#address-cells = <1>;

arch/arm/boot/dts/imx7d.dtsi

@@ -78,7 +78,7 @@ usbphynop2: usbphynop2 {
 		#phy-cells = <0>;
 	};
 
-	soc {
+	soc: soc {
 		etm@3007d000 {
 			compatible = "arm,coresight-etm3x", "arm,primecell";
 			reg = <0x3007d000 0x1000>;

arch/arm/boot/dts/imx7s.dtsi

@@ -175,7 +175,7 @@ timer {
 			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
-	soc {
+	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";