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arm64: dts: qcom: sdm630: rename labels for DSI nodes

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Currently in board files MDSS and DSI nodes stay apart, because labels
for DSI nodes do not have the mdss_ prefix. It was found that grouping
all display-related notes is more useful.

To keep all display-related nodes close in the board files, change DSI
node labels from dsi_* to mdss_dsi_*.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-11-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov 2023-05-31 04:16:19 +03:00 committed by Bjorn Andersson
parent c3c466d9f3
commit 8e61d53237
3 changed files with 30 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
View File

@ -134,7 +134,7 @@ port@0 {
reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi0_out>;
remote-endpoint = <&mdss_dsi0_out>;
};
};
@ -183,25 +183,25 @@ bluetooth {
};
};
&dsi0 {
&mdss {
status = "okay";
};
&mdss_dsi0 {
status = "okay";
vdda-supply = <&vreg_l1a_1p225>;
};
&dsi0_out {
&mdss_dsi0_out {
remote-endpoint = <&adv7533_in>;
data-lanes = <0 1 2 3>;
};
&dsi0_phy {
&mdss_dsi0_phy {
status = "okay";
vcca-supply = <&vreg_l1b_0p925>;
};
&mdss {
status = "okay";
};
&mmss_smmu {
status = "okay";
};

20
arch/arm64/boot/dts/qcom/sdm630.dtsi
View File

@ -1461,8 +1461,8 @@ mmcc: clock-controller@c8c0000 {
<&sleep_clk>,
<&gcc GCC_MMSS_GPLL0_CLK>,
<&gcc GCC_MMSS_GPLL0_DIV_CLK>,
<&dsi0_phy 1>,
<&dsi0_phy 0>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<0>,
<0>,
<0>,
@ -1534,7 +1534,7 @@ ports {
port@0 {
reg = <0>;
mdp5_intf1_out: endpoint {
remote-endpoint = <&dsi0_in>;
remote-endpoint = <&mdss_dsi0_in>;
};
};
};
@ -1570,7 +1570,7 @@ opp-412500000 {
};
};
dsi0: dsi@c994000 {
mdss_dsi0: dsi@c994000 {
compatible = "qcom,sdm660-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x0c994000 0x400>;
@ -1584,8 +1584,8 @@ dsi0: dsi@c994000 {
assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
<&mmcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi0_phy 0>,
<&dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
clocks = <&mmcc MDSS_MDP_CLK>,
<&mmcc MDSS_BYTE0_CLK>,
@ -1606,7 +1606,7 @@ dsi0: dsi@c994000 {
"pixel",
"core";
phys = <&dsi0_phy>;
phys = <&mdss_dsi0_phy>;
status = "disabled";
@ -1616,20 +1616,20 @@ ports {
port@0 {
reg = <0>;
dsi0_in: endpoint {
mdss_dsi0_in: endpoint {
remote-endpoint = <&mdp5_intf1_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
mdss_dsi0_out: endpoint {
};
};
};
};
dsi0_phy: phy@c994400 {
mdss_dsi0_phy: phy@c994400 {
compatible = "qcom,dsi-phy-14nm-660";
reg = <0x0c994400 0x100>,
<0x0c994500 0x300>,

24
arch/arm64/boot/dts/qcom/sdm660.dtsi
View File

@ -148,14 +148,14 @@ ports {
port@1 {
reg = <1>;
mdp5_intf2_out: endpoint {
remote-endpoint = <&dsi1_in>;
remote-endpoint = <&mdss_dsi1_in>;
};
};
};
};
&mdss {
dsi1: dsi@c996000 {
mdss_dsi1: dsi@c996000 {
compatible = "qcom,sdm660-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x0c996000 0x400>;
@ -170,8 +170,8 @@ dsi1: dsi@c996000 {
assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
<&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&dsi1_phy 0>,
<&dsi1_phy 1>;
assigned-clock-parents = <&mdss_dsi1_phy 0>,
<&mdss_dsi1_phy 1>;
clocks = <&mmcc MDSS_MDP_CLK>,
<&mmcc MDSS_BYTE1_CLK>,
@ -192,7 +192,7 @@ dsi1: dsi@c996000 {
"pixel",
"core";
phys = <&dsi1_phy>;
phys = <&mdss_dsi1_phy>;
status = "disabled";
@ -202,20 +202,20 @@ ports {
port@0 {
reg = <0>;
dsi1_in: endpoint {
mdss_dsi1_in: endpoint {
remote-endpoint = <&mdp5_intf2_out>;
};
};
port@1 {
reg = <1>;
dsi1_out: endpoint {
mdss_dsi1_out: endpoint {
};
};
};
};
dsi1_phy: phy@c996400 {
mdss_dsi1_phy: phy@c996400 {
compatible = "qcom,dsi-phy-14nm-660";
reg = <0x0c996400 0x100>,
<0x0c996500 0x300>,
@ -239,10 +239,10 @@ &mmcc {
<&sleep_clk>,
<&gcc GCC_MMSS_GPLL0_CLK>,
<&gcc GCC_MMSS_GPLL0_DIV_CLK>,
<&dsi0_phy 1>,
<&dsi0_phy 0>,
<&dsi1_phy 1>,
<&dsi1_phy 0>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi1_phy 1>,
<&mdss_dsi1_phy 0>,
<0>,
<0>;
};