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dt-bindings: pinctrl: convert fsl,imx27-pinctrl.txt to YAML
Convert fsl,imx27-pinctrl.txt to YAML format. Additional changes: - Add the compatible string "fsl,imx1-iomuxc". - Add gpio@... child nodes. - Add ranges property. - Remove the redundant intermediate node between pinmux and group nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Frank Li
Linus Walleij
parent
7a29f37325
commit
8dba7a13a4
126
Documentation/devicetree/bindings/pinctrl/fsl,imx27-iomuxc.yaml
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126
Documentation/devicetree/bindings/pinctrl/fsl,imx27-iomuxc.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/fsl,imx27-iomuxc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX1/i.MX25/i.MX27 IOMUX Controller
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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description:
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Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
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for common binding part and usage.
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properties:
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compatible:
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enum:
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- fsl,imx1-iomuxc
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- fsl,imx27-iomuxc
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reg:
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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ranges: true
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patternProperties:
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'^gpio@[0-9a-f]+$':
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type: object
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$ref: /schemas/gpio/fsl-imx-gpio.yaml
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unevaluatedProperties: false
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'grp$':
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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properties:
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fsl,pins:
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description:
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three integers array, represents a group of pins mux and config
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setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description:
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PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32
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configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN
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is the pin number on the specific port (between 0 and 31)
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- description: |
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MUX_ID is function + (direction << 2) + (gpio_oconf << 4)
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+ (gpio_iconfa << 8) + (gpio_iconfb << 10)
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function value is used to select the pin function.
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Possible values:
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0 - Primary function
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1 - Alternate function
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2 - GPIO
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Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
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direction defines the data direction of the pin.
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Possible values:
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0 - Input
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1 - Output
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Register: DDIR
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gpio_oconf configures the gpio submodule output signal.
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This does not have any effect unless GPIO function is
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selected. A/B/C_IN are output signals of function blocks
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A,B and C. Specific function blocks are described in the
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reference manual.
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Possible values:
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0 - A_IN
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1 - B_IN
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2 - C_IN
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3 - Data Register
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Registers: OCR1, OCR2
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gpio_iconfa/b configures the gpio submodule input to
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functionblocks A and B. GPIO function should be selected if
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this is configured.
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Possible values:
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0 - GPIO_IN
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1 - Interrupt Status Register
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2 - Pulldown
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3 - Pullup
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Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2
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- description:
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CONFIG can be 0 or 1, meaning Pullup disable/enable.
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required:
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- fsl,pins
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additionalProperties: false
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required:
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- compatible
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- reg
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allOf:
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- $ref: pinctrl.yaml#
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unevaluatedProperties: false
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examples:
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- |
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pinmux@10015000 {
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compatible = "fsl,imx27-iomuxc";
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reg = <0x10015000 0x600>;
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uartgrp {
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fsl,pins = <
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0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
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0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
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0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */
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0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */
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>;
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};
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};
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@ -1,121 +0,0 @@
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* Freescale IMX27 IOMUX Controller
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Required properties:
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- compatible: "fsl,imx27-iomuxc"
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The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
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Required properties for pin configuration node:
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- fsl,pins: three integers array, represents a group of pins mux and config
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setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
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PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
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configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin
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number on the specific port (between 0 and 31).
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MUX_ID is
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function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10)
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function value is used to select the pin function.
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Possible values:
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0 - Primary function
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1 - Alternate function
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2 - GPIO
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Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
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direction defines the data direction of the pin.
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Possible values:
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0 - Input
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1 - Output
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Register: DDIR
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gpio_oconf configures the gpio submodule output signal. This does not
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have any effect unless GPIO function is selected. A/B/C_IN are output
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signals of function blocks A,B and C. Specific function blocks are
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described in the reference manual.
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Possible values:
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0 - A_IN
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1 - B_IN
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2 - C_IN
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3 - Data Register
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Registers: OCR1, OCR2
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gpio_iconfa/b configures the gpio submodule input to functionblocks A and
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B. GPIO function should be selected if this is configured.
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Possible values:
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0 - GPIO_IN
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1 - Interrupt Status Register
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2 - Pulldown
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3 - Pullup
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Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2
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CONFIG can be 0 or 1, meaning Pullup disable/enable.
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The iomux controller has gpio child nodes which are embedded in the iomux
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control registers. They have to be defined as child nodes of the iomux device
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node. If gpio subnodes are defined "#address-cells", "#size-cells" and "ranges"
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properties for the iomux device node are required.
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Example:
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iomuxc: iomuxc@10015000 {
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compatible = "fsl,imx27-iomuxc";
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reg = <0x10015000 0x600>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio1: gpio@10015000 {
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...
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};
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...
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uart {
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pinctrl_uart1: uart-1 {
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fsl,pins = <
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0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
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0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
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0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */
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0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */
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>;
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};
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...
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};
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};
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For convenience there are macros defined in imx27-pinfunc.h which provide PIN
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and MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names
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are defined in the i.MX27 reference manual.
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The above example using macros:
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iomuxc: iomuxc@10015000 {
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compatible = "fsl,imx27-iomuxc";
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reg = <0x10015000 0x600>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio1: gpio@10015000 {
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...
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};
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...
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uart {
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pinctrl_uart1: uart-1 {
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fsl,pins = <
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MX27_PAD_UART1_TXD__UART1_TXD 0x0
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MX27_PAD_UART1_RXD__UART1_RXD 0x0
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MX27_PAD_UART1_CTS__UART1_CTS 0x0
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MX27_PAD_UART1_RTS__UART1_RTS 0x0
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>;
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};
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...
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};
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};
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