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arm64: dts: imx94: Add pcie0 and pcie0-ep supports
Add pcie0 and pcie0-ep supports. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
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8cd439f177
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@ -67,6 +67,13 @@ sai4_mclk: clock-sai4-mclk1 {
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clock-output-names = "sai4_mclk";
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clock-output-names = "sai4_mclk";
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};
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};
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clk_sys100m: clock-sys100m {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "clk_sys100m";
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};
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firmware {
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firmware {
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scmi {
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scmi {
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compatible = "arm,scmi";
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compatible = "arm,scmi";
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@ -1286,6 +1293,14 @@ wdog3: watchdog@49220000 {
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};
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};
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};
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};
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hsio_blk_ctl: syscon@4c0100c0 {
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compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
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reg = <0x0 0x4c0100c0 0x0 0x1>;
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#clock-cells = <1>;
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clocks = <&clk_sys100m>;
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power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
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};
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usb3: usb@4c100000 {
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usb3: usb@4c100000 {
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compatible = "nxp,imx94-dwc3", "nxp,imx8mp-dwc3";
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compatible = "nxp,imx94-dwc3", "nxp,imx8mp-dwc3";
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reg = <0x0 0x4c100000 0x0 0x10000>,
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reg = <0x0 0x4c100000 0x0 0x10000>,
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@ -1340,6 +1355,79 @@ usbmisc: usbmisc@4c200200 {
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#index-cells = <1>;
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#index-cells = <1>;
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};
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};
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pcie0: pcie@4c300000 {
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compatible = "fsl,imx94-pcie", "fsl,imx95-pcie";
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reg = <0 0x4c300000 0 0x10000>,
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<0 0x60100000 0 0xfe00000>,
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<0 0x4c360000 0 0x10000>,
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<0 0x4c340000 0 0x4000>;
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reg-names = "dbi", "config", "atu", "app";
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ranges = <0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000>,
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<0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x80000000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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linux,pci-domain = <2>;
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msi-map = <0x0 &its 0x10 0x1>,
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<0x100 &its 0x11 0x7>;
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msi-map-mask = <0x1ff>;
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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num-viewport = <8>;
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interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi", "dma";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &gic 0 0 GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &gic 0 0 GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &gic 0 0 GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&scmi_clk IMX94_CLK_HSIO>,
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<&scmi_clk IMX94_CLK_HSIOPLL>,
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<&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
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<&scmi_clk IMX94_CLK_HSIOPCIEAUX>,
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<&hsio_blk_ctl 0>;
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clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
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assigned-clocks = <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
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<&scmi_clk IMX94_CLK_HSIOPLL>,
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<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
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assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
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assigned-clock-parents = <0>, <0>,
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<&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
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power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
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fsl,max-link-speed = <3>;
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status = "disabled";
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};
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pcie0_ep: pcie-ep@4c300000 {
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compatible = "fsl,imx94-pcie-ep", "fsl,imx95-pcie-ep";
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reg = <0 0x4c300000 0 0x10000>,
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<0 0x4c360000 0 0x1000>,
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<0 0x4c320000 0 0x1000>,
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<0 0x4c340000 0 0x4000>,
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<0 0x4c370000 0 0x10000>,
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<0x9 0 1 0>;
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reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";
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num-lanes = <1>;
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interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "dma";
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clocks = <&scmi_clk IMX94_CLK_HSIO>,
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<&scmi_clk IMX94_CLK_HSIOPLL>,
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<&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
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<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
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clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
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assigned-clocks = <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
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<&scmi_clk IMX94_CLK_HSIOPLL>,
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<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
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assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
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assigned-clock-parents = <0>, <0>,
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<&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
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msi-map = <0x0 &its 0x10 0x1>;
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power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
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status = "disabled";
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};
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netc_blk_ctrl: system-controller@4ceb0000 {
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netc_blk_ctrl: system-controller@4ceb0000 {
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compatible = "nxp,imx94-netc-blk-ctrl";
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compatible = "nxp,imx94-netc-blk-ctrl";
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reg = <0x0 0x4ceb0000 0x0 0x10000>,
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reg = <0x0 0x4ceb0000 0x0 0x10000>,
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