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drm/amd/pm: Add clock table structure

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Add a common clock table structure to represent dpm levels for different
clocks.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2025-11-25 12:13:51 +05:30 committed by Alex Deucher
parent 448ee45353
commit 8c5c0ea2f9
1 changed files with 22 additions and 0 deletions
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22
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
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@ -292,6 +292,28 @@ struct smu_clock_info {
uint32_t max_bus_bandwidth;
};
#define SMU_MAX_DPM_LEVELS 16
struct smu_dpm_clk_level {
bool enabled;
uint32_t value;
};
#define SMU_DPM_TABLE_FINE_GRAINED BIT(0)
struct smu_dpm_table {
enum smu_clk_type clk_type;
uint32_t count;
uint32_t flags;
struct smu_dpm_clk_level dpm_levels[SMU_MAX_DPM_LEVELS];
};
#define SMU_DPM_TABLE_MIN(table) \
((table)->count > 0 ? (table)->dpm_levels[0].value : 0)
#define SMU_DPM_TABLE_MAX(table) \
((table)->count > 0 ? (table)->dpm_levels[(table)->count - 1].value : 0)
struct smu_bios_boot_up_values {
uint32_t revision;
uint32_t gfxclk;