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ARM: dts: lan966x: add flexcom SPI nodes

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Add all the SPI nodes for the flexcom IP block. Keep them
disabled by default.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-6-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
This commit is contained in:
Michael Walle 2022-05-03 00:41:19 +02:00 committed by Claudiu Beznea
parent 1e17387a30
commit 8c38c72c29
1 changed files with 75 additions and 0 deletions
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75
arch/arm/boot/dts/lan966x.dtsi
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@ -105,6 +105,21 @@ usart0: serial@200 {
atmel,fifo-size = <32>;
status = "disabled";
};
spi0: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
<&dma0 AT91_XDMAC_DT_PERID(2)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
flx1: flexcom@e0044000 {
@ -128,6 +143,21 @@ usart1: serial@200 {
atmel,fifo-size = <32>;
status = "disabled";
};
spi1: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
<&dma0 AT91_XDMAC_DT_PERID(4)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
trng: rng@e0048000 {
@ -168,6 +198,21 @@ usart2: serial@200 {
atmel,fifo-size = <32>;
status = "disabled";
};
spi2: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
<&dma0 AT91_XDMAC_DT_PERID(6)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
flx3: flexcom@e0064000 {
@ -191,6 +236,21 @@ usart3: serial@200 {
atmel,fifo-size = <32>;
status = "disabled";
};
spi3: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
<&dma0 AT91_XDMAC_DT_PERID(8)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
dma0: dma-controller@e0068000 {
@ -233,6 +293,21 @@ usart4: serial@200 {
atmel,fifo-size = <32>;
status = "disabled";
};
spi4: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
<&dma0 AT91_XDMAC_DT_PERID(10)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
timer0: timer@e008c000 {