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staging: hikey9xx: phy-hi3670-usb3: fix coding style
Address the issues reported by checkpatch --strict, and add a SPDX tag. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/6b1f66068905b7d0a9a988c9d0bd4ebef19a6fc2.1600338981.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mauro Carvalho Chehab
Greg Kroah-Hartman
parent
cf58bf42da
commit
8c2a794c87
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@ -1,28 +1,20 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Phy provider for USB 3.1 controller on HiSilicon Kirin970 platform
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*
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* Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd.
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* Copyright (C) 2017-2020 Hilisicon Electronics Co., Ltd.
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* http://www.huawei.com
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*
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* Authors: Yu Chen <chenyu56@huawei.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 of
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* the License as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/clk.h>
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#define SCTRL_SCDEEPSLEEPED (0x0)
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#define USB_CLK_SELECTED BIT(20)
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@ -116,7 +108,7 @@
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#define TCPC_VALID BIT(4)
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#define TCPC_LOW_POWER_EN BIT(3)
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#define TCPC_MUX_CONTROL_MASK (3 << 0)
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#define TCPC_MUX_CONTROL_USB31 (1 << 0)
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#define TCPC_MUX_CONTROL_USB31 BIT(0)
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#define SYSMODE_CFG_TYPEC_DISABLE BIT(3)
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@ -151,13 +143,13 @@ static int hi3670_phy_cr_clk(struct regmap *usb31misc)
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/* Clock up */
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ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
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CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
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CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
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if (ret)
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return ret;
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/* Clock down */
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ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
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CFG54_USB31PHY_CR_CLK, 0);
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CFG54_USB31PHY_CR_CLK, 0);
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return ret;
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}
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@ -165,7 +157,7 @@ static int hi3670_phy_cr_clk(struct regmap *usb31misc)
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static int hi3670_phy_cr_set_sel(struct regmap *usb31misc)
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{
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return regmap_update_bits(usb31misc, USB_MISC_CFG54,
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CFG54_USB31PHY_CR_SEL, CFG54_USB31PHY_CR_SEL);
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CFG54_USB31PHY_CR_SEL, CFG54_USB31PHY_CR_SEL);
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}
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static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
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@ -174,10 +166,12 @@ static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
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if (direction)
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ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
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CFG54_USB31PHY_CR_WR_EN, CFG54_USB31PHY_CR_WR_EN);
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CFG54_USB31PHY_CR_WR_EN,
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CFG54_USB31PHY_CR_WR_EN);
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else
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ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
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CFG54_USB31PHY_CR_RD_EN, CFG54_USB31PHY_CR_RD_EN);
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CFG54_USB31PHY_CR_RD_EN,
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CFG54_USB31PHY_CR_RD_EN);
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if (ret)
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return ret;
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@ -187,7 +181,7 @@ static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
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return ret;
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ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
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CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0);
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CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0);
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return ret;
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}
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@ -223,8 +217,7 @@ static int hi3670_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
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return ret;
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reg &= ~(CFG54_USB31PHY_CR_ADDR_MASK << CFG54_USB31PHY_CR_ADDR_SHIFT);
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reg |= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) <<
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CFG54_USB31PHY_CR_ADDR_SHIFT);
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reg |= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) << CFG54_USB31PHY_CR_ADDR_SHIFT);
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ret = regmap_write(usb31misc, USB_MISC_CFG54, reg);
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return ret;
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@ -288,7 +281,7 @@ static int hi3670_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
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return ret;
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ret = regmap_write(usb31misc, USB_MISC_CFG58,
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val & CFG58_USB31PHY_CR_DATA_MASK);
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val & CFG58_USB31PHY_CR_DATA_MASK);
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if (ret)
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return ret;
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@ -308,7 +301,7 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv)
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int retry = 3;
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ret = regmap_write(priv->usb31misc, USB3OTG_CTRL4,
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priv->eye_diagram_param);
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priv->eye_diagram_param);
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if (ret) {
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dev_err(priv->dev, "set USB3OTG_CTRL4 failed\n");
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return ret;
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@ -316,10 +309,11 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv)
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while (retry-- > 0) {
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ret = hi3670_phy_cr_read(priv->usb31misc,
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TX_VBOOST_LVL_REG, ®);
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TX_VBOOST_LVL_REG, ®);
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if (!ret)
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break;
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else if (ret != -ETIMEDOUT) {
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if (ret != -ETIMEDOUT) {
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dev_err(priv->dev, "read TX_VBOOST_LVL_REG failed\n");
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return ret;
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}
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@ -327,8 +321,7 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv)
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if (ret)
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return ret;
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reg |= (TX_VBOOST_LVL_ENABLE |
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(priv->tx_vboost_lvl << TX_VBOOST_LVL_START));
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reg |= (TX_VBOOST_LVL_ENABLE | (priv->tx_vboost_lvl << TX_VBOOST_LVL_START));
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ret = hi3670_phy_cr_write(priv->usb31misc, TX_VBOOST_LVL_REG, reg);
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if (ret)
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dev_err(priv->dev, "write TX_VBOOST_LVL_REG failed\n");
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@ -364,24 +357,24 @@ static int hi3670_config_phy_clock(struct hi3670_priv *priv)
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if (hi3670_is_abbclk_seleted(priv)) {
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/* usb refclk iso disable */
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ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS,
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USB_REFCLK_ISO_EN);
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USB_REFCLK_ISO_EN);
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if (ret)
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goto out;
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/* enable usb_tcxo_en */
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ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
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USB_TCXO_EN |
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(USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
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USB_TCXO_EN |
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(USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
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/* select usbphy clk from abb */
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mask = SC_CLK_USB3PHY_3MUX1_SEL;
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ret = regmap_update_bits(priv->pctrl,
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PCTRL_PERI_CTRL24, mask, 0);
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PCTRL_PERI_CTRL24, mask, 0);
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if (ret)
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goto out;
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
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CFGA0_USB2PHY_REFCLK_SELECT, 0);
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CFGA0_USB2PHY_REFCLK_SELECT, 0);
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if (ret)
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goto out;
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@ -393,34 +386,36 @@ static int hi3670_config_phy_clock(struct hi3670_priv *priv)
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ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
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if (ret)
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goto out;
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} else {
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
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CFG54_USB3PHY_REF_USE_PAD,
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CFG54_USB3PHY_REF_USE_PAD);
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if (ret)
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goto out;
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
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CFGA0_USB2PHY_REFCLK_SELECT,
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CFGA0_USB2PHY_REFCLK_SELECT);
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if (ret)
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goto out;
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ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
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if (ret)
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goto out;
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val &= ~CTRL7_USB2_REFCLKSEL_MASK;
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val |= CTRL7_USB2_REFCLKSEL_PAD;
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ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
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if (ret)
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goto out;
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ret = regmap_write(priv->peri_crg,
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PERI_CRG_PEREN6, GT_CLK_USB2PHY_REF);
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if (ret)
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goto out;
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return 0;
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}
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
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CFG54_USB3PHY_REF_USE_PAD,
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CFG54_USB3PHY_REF_USE_PAD);
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if (ret)
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goto out;
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
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CFGA0_USB2PHY_REFCLK_SELECT,
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CFGA0_USB2PHY_REFCLK_SELECT);
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if (ret)
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goto out;
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ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
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if (ret)
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goto out;
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val &= ~CTRL7_USB2_REFCLKSEL_MASK;
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val |= CTRL7_USB2_REFCLKSEL_PAD;
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ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
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if (ret)
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goto out;
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ret = regmap_write(priv->peri_crg,
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PERI_CRG_PEREN6, GT_CLK_USB2PHY_REF);
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if (ret)
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goto out;
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return 0;
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out:
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dev_err(priv->dev, "failed to config phy clock ret: %d\n", ret);
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@ -437,7 +432,7 @@ static int hi3670_config_tca(struct hi3670_priv *priv)
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goto out;
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ret = regmap_write(priv->usb31misc, TCA_INTR_EN,
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INTR_EN_XA_TIMEOUT_EVT_EN | INTR_EN_XA_ACK_EVT_EN);
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INTR_EN_XA_TIMEOUT_EVT_EN | INTR_EN_XA_ACK_EVT_EN);
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if (ret)
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goto out;
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@ -447,13 +442,13 @@ static int hi3670_config_tca(struct hi3670_priv *priv)
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goto out;
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ret = regmap_update_bits(priv->usb31misc, TCA_GCFG,
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GCFG_ROLE_HSTDEV | GCFG_OP_MODE,
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GCFG_ROLE_HSTDEV | GCFG_OP_MODE_CTRL_SYNC_MODE);
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GCFG_ROLE_HSTDEV | GCFG_OP_MODE,
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GCFG_ROLE_HSTDEV | GCFG_OP_MODE_CTRL_SYNC_MODE);
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if (ret)
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goto out;
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ret = regmap_update_bits(priv->usb31misc, TCA_SYSMODE_CFG,
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SYSMODE_CFG_TYPEC_DISABLE, 0);
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SYSMODE_CFG_TYPEC_DISABLE, 0);
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if (ret)
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goto out;
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@ -467,7 +462,7 @@ static int hi3670_config_tca(struct hi3670_priv *priv)
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goto out;
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ret = regmap_write(priv->usb31misc, TCA_VBUS_CTRL,
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VBUS_CTRL_POWERPRESENT_OVERRD | VBUS_CTRL_VBUSVALID_OVERRD);
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VBUS_CTRL_POWERPRESENT_OVERRD | VBUS_CTRL_VBUSVALID_OVERRD);
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if (ret)
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goto out;
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@ -485,7 +480,7 @@ static int hi3670_phy_init(struct phy *phy)
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/* assert controller */
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val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET |
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CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
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CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
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if (ret)
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goto out;
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@ -496,13 +491,13 @@ static int hi3670_phy_init(struct phy *phy)
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/* Exit from IDDQ mode */
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ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL5,
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CTRL5_USB2_SIDDQ, 0);
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CTRL5_USB2_SIDDQ, 0);
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if (ret)
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goto out;
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/* Release USB31 PHY out of TestPowerDown mode */
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG50,
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CFG50_USB3_PHY_TEST_POWERDOWN, 0);
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CFG50_USB3_PHY_TEST_POWERDOWN, 0);
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if (ret)
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goto out;
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@ -512,13 +507,13 @@ static int hi3670_phy_init(struct phy *phy)
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if (ret)
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goto out;
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udelay(100);
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usleep_range(100, 120);
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/* Tell the PHY power is stable */
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val = CFG54_USB3_PHY0_ANA_PWR_EN | CFG54_PHY0_PCS_PWR_STABLE |
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CFG54_PHY0_PMA_PWR_STABLE;
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CFG54_PHY0_PMA_PWR_STABLE;
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
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val, val);
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val, val);
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if (ret)
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goto out;
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@ -528,8 +523,8 @@ static int hi3670_phy_init(struct phy *phy)
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/* Enable SSC */
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ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG5C,
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CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN,
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CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN);
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CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN,
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CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN);
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if (ret)
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goto out;
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|
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@ -539,7 +534,7 @@ static int hi3670_phy_init(struct phy *phy)
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if (ret)
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goto out;
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udelay(100);
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usleep_range(100, 120);
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/* Set fake vbus valid signal */
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val = CTRL0_USB3_VBUSVLD | CTRL0_USB3_VBUSVLD_SEL;
|
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|
|
@ -552,7 +547,7 @@ static int hi3670_phy_init(struct phy *phy)
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if (ret)
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goto out;
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udelay(100);
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usleep_range(100, 120);
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|
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ret = hi3670_phy_set_params(priv);
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if (ret)
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|
|
@ -579,10 +574,10 @@ static int hi3670_phy_exit(struct phy *phy)
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if (hi3670_is_abbclk_seleted(priv)) {
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/* disable usb_tcxo_en */
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ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
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USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
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USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
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} else {
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ret = regmap_write(priv->peri_crg, PERI_CRG_PERDIS6,
|
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GT_CLK_USB2PHY_REF);
|
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GT_CLK_USB2PHY_REF);
|
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if (ret)
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goto out;
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}
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|
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@ -612,39 +607,39 @@ static int hi3670_phy_probe(struct platform_device *pdev)
|
|||
|
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priv->dev = dev;
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priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node,
|
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"hisilicon,pericrg-syscon");
|
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"hisilicon,pericrg-syscon");
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if (IS_ERR(priv->peri_crg)) {
|
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dev_err(dev, "no hisilicon,pericrg-syscon\n");
|
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return PTR_ERR(priv->peri_crg);
|
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}
|
||||
|
||||
priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
|
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"hisilicon,pctrl-syscon");
|
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"hisilicon,pctrl-syscon");
|
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if (IS_ERR(priv->pctrl)) {
|
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dev_err(dev, "no hisilicon,pctrl-syscon\n");
|
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return PTR_ERR(priv->pctrl);
|
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}
|
||||
|
||||
priv->sctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
|
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"hisilicon,sctrl-syscon");
|
||||
"hisilicon,sctrl-syscon");
|
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if (IS_ERR(priv->sctrl)) {
|
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dev_err(dev, "no hisilicon,sctrl-syscon\n");
|
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return PTR_ERR(priv->sctrl);
|
||||
}
|
||||
|
||||
priv->usb31misc = syscon_regmap_lookup_by_phandle(dev->of_node,
|
||||
"hisilicon,usb31-misc-syscon");
|
||||
"hisilicon,usb31-misc-syscon");
|
||||
if (IS_ERR(priv->usb31misc)) {
|
||||
dev_err(dev, "no hisilicon,usb31-misc-syscon\n");
|
||||
return PTR_ERR(priv->usb31misc);
|
||||
}
|
||||
|
||||
if (of_property_read_u32(dev->of_node, "eye-diagram-param",
|
||||
&(priv->eye_diagram_param)))
|
||||
&priv->eye_diagram_param))
|
||||
priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_PARAM;
|
||||
|
||||
if (of_property_read_u32(dev->of_node, "usb3-phy-tx-vboost-lvl",
|
||||
&(priv->tx_vboost_lvl)))
|
||||
&priv->tx_vboost_lvl))
|
||||
priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_VBOOST;
|
||||
|
||||
phy = devm_phy_create(dev, NULL, &hi3670_phy_ops);
|
||||
|
|
@ -657,7 +652,7 @@ static int hi3670_phy_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
static const struct of_device_id hi3670_phy_of_match[] = {
|
||||
{.compatible = "hisilicon,hi3670-usb-phy",},
|
||||
{ .compatible = "hisilicon,hi3670-usb-phy" },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, hi3670_phy_of_match);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user