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Samsung DTS ARM changes for v5.10

Browse Source 
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
 2. Add sound support to Galaxy S/Aries family (S5Pv210).
 3. Configure L2C-310 cache controller via DTS on Exynos4.
 4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
    possible.  This includes adding missing properties (thus e.g.
    enabling S3C RTC clock), correcting existing nodes, renaming of
    nodes and using non-deprecated properties or compatibles.  Except
    mentioned bring up of S3C RTC, this should not have visible
    effect.
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Merge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.10

1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
   possible.  This includes adding missing properties (thus e.g.
   enabling S3C RTC clock), correcting existing nodes, renaming of
   nodes and using non-deprecated properties or compatibles.  Except
   mentioned bring up of S3C RTC, this should not have visible
   effect.

* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
  ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
  ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
  ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
  ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
  ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
  ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
  ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
  ARM: dts: exynos: Override thermal by label in Exynos5250
  ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
  ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
  ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5 GIC
  ARM: dts: s5pv210: Enable audio on Aries boards
  ARM: dts: exynos: Correct whitespace and indentation issues
  ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
  ARM: dts: exynos: Add CPU cooling in Tiny4412
  ARM: dts: exynos: Add CPU cooling in SMDK4412
  ...

Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-09-13 11:22:36 -07:00
commit 8bc946b1a1
38 changed files with 892 additions and 360 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/devicetree/bindings/arm/samsung/pmu.yaml
View File

@ -85,12 +85,28 @@ properties:
required:
- compatible
- reg
- '#clock-cells'
- clock-names
- clocks
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- samsung,exynos3250-pmu
- samsung,exynos4210-pmu
- samsung,exynos4412-pmu
- samsung,exynos5250-pmu
- samsung,exynos5410-pmu
- samsung,exynos5420-pmu
- samsung,exynos5433-pmu
then:
required:
- '#clock-cells'
- clock-names
- clocks
examples:
- |
#include <dt-bindings/clock/exynos5250.h>

2
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -26,7 +26,7 @@ aliases {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x1ff00000>;
reg = <0x40000000 0x1ff00000>;
};
firmware@205f000 {

2
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -30,7 +30,7 @@ chosen {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x1ff00000>;
reg = <0x40000000 0x1ff00000>;
};
firmware@205f000 {

44
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -97,33 +97,25 @@ cpu1: cpu@1 {
};
};
fixed-rate-clocks {
#address-cells = <1>;
#size-cells = <0>;
xusbxti: clock-0 {
compatible = "fixed-clock";
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xusbxti";
};
xusbxti: clock@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xusbxti";
};
xxti: clock-1 {
compatible = "fixed-clock";
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xxti";
};
xxti: clock@1 {
compatible = "fixed-clock";
reg = <1>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xxti";
};
xtcxo: clock@2 {
compatible = "fixed-clock";
reg = <2>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xtcxo";
};
xtcxo: clock-2 {
compatible = "fixed-clock";
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xtcxo";
};
pmu {
@ -362,7 +354,7 @@ sysmmu_fimd0: sysmmu@11e20000 {
};
hsotg: hsotg@12480000 {
compatible = "samsung,s3c6400-hsotg", "snps,dwc2";
compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_USBOTG>;

56
arch/arm/boot/dts/exynos4210-i9100.dts
View File

@ -123,7 +123,7 @@ wlan_pwrseq: sdhci3-pwrseq {
reset-gpios = <&gpl1 2 GPIO_ACTIVE_LOW>;
};
i2c_max17042_fuel: i2c-gpio {
i2c_max17042_fuel: i2c-gpio-0 {
compatible = "i2c-gpio";
#address-cells = <1>;
#size-cells = <0>;
@ -147,7 +147,7 @@ battery@36 {
};
};
spi-lcd {
spi-3 {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
@ -209,20 +209,12 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz */
cooling-device = <&cpu0 2 2>;
};
map1 {
/* Corresponds to 200MHz */
cooling-device = <&cpu0 4 4>;
};
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on max8997 PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
@ -235,6 +227,19 @@ &cpu0 {
cpu0-supply = <&varm_breg>;
};
&cpu_thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz */
cooling-device = <&cpu0 2 2>;
};
map1 {
/* Corresponds to 200MHz */
cooling-device = <&cpu0 4 4>;
};
};
};
&ehci {
status = "okay";
@ -304,8 +309,6 @@ &gpu {
status = "okay";
mali-supply = <&vg3d_breg>;
regulator-microvolt-offset = <50000>;
regulator-microsecs-delay = <50>;
};
&hsotg {
@ -524,6 +527,7 @@ vg3d_breg: BUCK3 {
regulator-name = "G3D_1.1V";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1200000>;
regulator-microvolt-offset = <50000>;
regulator-always-on;
};
@ -569,6 +573,16 @@ chargercv_reg: CHARGER_CV {
regulator-max-microvolt = <4100000>;
regulator-always-on;
};
EN32KHZ_AP {
regulator-name = "EN32KHZ_AP";
regulator-always-on;
};
EN32KHZ_CP {
regulator-name = "EN32KHZ_CP";
regulator-always-on;
};
};
};
};
@ -667,7 +681,7 @@ otg_gp: otg-gp {
samsung,pin-val = <0>;
};
mag_mhl_gpio: mag-mhl-gpio {
mag_mhl_gpio: mag-mhl {
samsung,pins = "gpd0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
@ -689,6 +703,12 @@ tsp224_irq: tsp224-irq {
};
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci_0 {
status = "okay";

27
arch/arm/boot/dts/exynos4210-origen.dts
View File

@ -100,6 +100,13 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on max8997 PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
display-timings {
@ -122,6 +129,19 @@ &cpu0 {
cpu0-supply = <&buck1_reg>;
};
&cpu_thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz */
cooling-device = <&cpu0 2 2>;
};
map1 {
/* Corresponds to 200MHz */
cooling-device = <&cpu0 4 4>;
};
};
};
&exynos_usbphy {
status = "okay";
};
@ -286,6 +306,11 @@ buck7_reg: BUCK7 {
regulator-boot-on;
regulator-always-on;
};
EN32KHZ_AP {
regulator-name = "EN32KHZ_AP";
regulator-always-on;
};
};
};
};
@ -331,6 +356,8 @@ &serial_3 {
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&tmu {

25
arch/arm/boot/dts/exynos4210-smdkv310.dts
View File

@ -40,6 +40,26 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
&cpu_thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz */
cooling-device = <&cpu0 2 2>;
};
map1 {
/* Corresponds to 200MHz */
cooling-device = <&cpu0 4 4>;
};
};
};
@ -148,6 +168,11 @@ keypad_cols: keypad-cols {
};
};
&rtc {
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci_2 {
bus-width = <4>;
pinctrl-names = "default";

186
arch/arm/boot/dts/exynos4210-trats.dts
View File

@ -132,23 +132,14 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 2 2>, <&cpu1 2 2>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 4 4>, <&cpu1 4 4>;
};
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on max8997 PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
&camera {
@ -161,6 +152,19 @@ &cpu0 {
cpu0-supply = <&varm_breg>;
};
&cpu_thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 2 2>, <&cpu1 2 2>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 4 4>, <&cpu1 4 4>;
};
};
};
&dsi_0 {
vddcore-supply = <&vusb_reg>;
vddio-supply = <&vmipi_reg>;
@ -314,140 +318,156 @@ max8997_pmic@66 {
regulators {
valive_reg: LDO2 {
regulator-name = "VALIVE_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-name = "VALIVE_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
vusb_reg: LDO3 {
regulator-name = "VUSB_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "VUSB_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
vmipi_reg: LDO4 {
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vpda_reg: LDO6 {
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcam_reg: LDO7 {
regulator-name = "CAM_ISP_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "CAM_ISP_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vusbdac_reg: LDO8 {
regulator-name = "VUSB+VDAC_3.3V_C210";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "VUSB+VDAC_3.3V_C210";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vccpda_reg: LDO9 {
regulator-name = "VCC_2.8V_PDA";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
regulator-name = "VCC_2.8V_PDA";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
vpll_reg: LDO10 {
regulator-name = "VPLL_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-name = "VPLL_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
vtcam_reg: LDO12 {
regulator-name = "VT_CAM_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "VT_CAM_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcclcd_reg: LDO13 {
regulator-name = "VCC_3.3V_LCD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "VCC_3.3V_LCD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vlcd_reg: LDO15 {
regulator-name = "VLCD_2.2V";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
regulator-name = "VLCD_2.2V";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
};
camsensor_reg: LDO16 {
regulator-name = "CAM_SENSOR_IO_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "CAM_SENSOR_IO_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
tflash_reg: LDO17 {
regulator-name = "VTF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "VTF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
vddq_reg: LDO21 {
regulator-name = "VDDQ_M1M2_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-name = "VDDQ_M1M2_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
varm_breg: BUCK1 {
regulator-name = "VARM_1.2V_C210";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-name = "VARM_1.2V_C210";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
vint_breg: BUCK2 {
regulator-name = "VINT_1.1V_C210";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-name = "VINT_1.1V_C210";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
camisp_breg: BUCK4 {
regulator-name = "CAM_ISP_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "CAM_ISP_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vmem_breg: BUCK5 {
regulator-name = "VMEM_1.2V_C210";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-name = "VMEM_1.2V_C210";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vccsub_breg: BUCK7 {
regulator-name = "VCC_SUB_2.0V";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
regulator-name = "VCC_SUB_2.0V";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
};
safe1_sreg: ESAFEOUT1 {
regulator-name = "SAFEOUT1";
regulator-name = "SAFEOUT1";
};
safe2_sreg: ESAFEOUT2 {
regulator-name = "SAFEOUT2";
regulator-boot-on;
regulator-name = "SAFEOUT2";
regulator-boot-on;
};
EN32KHZ_AP {
regulator-name = "EN32KHZ_AP";
regulator-always-on;
};
EN32KHZ_CP {
regulator-name = "EN32KHZ_CP";
regulator-always-on;
};
};
};
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci_0 {
bus-width = <8>;
non-removable;

36
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -39,10 +39,17 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
vemmc_reg: voltage-regulator {
compatible = "regulator-fixed";
compatible = "regulator-fixed";
regulator-name = "VMEM_VDD_2_8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
@ -104,7 +111,7 @@ ok-key {
};
tsp_reg: voltage-regulator {
compatible = "regulator-fixed";
compatible = "regulator-fixed";
regulator-name = "TSP_2_8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
@ -112,13 +119,13 @@ tsp_reg: voltage-regulator {
enable-active-high;
};
spi-lcd {
spi-3 {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpy3 1 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpy3 3 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>;
@ -192,6 +199,19 @@ &cpu0 {
cpu0-supply = <&vdd_arm_reg>;
};
&cpu_thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz */
cooling-device = <&cpu0 2 2>;
};
map1 {
/* Corresponds to 200MHz */
cooling-device = <&cpu0 4 4>;
};
};
};
&ehci {
status = "okay";
phys = <&exynos_usbphy 1>;
@ -537,6 +557,12 @@ &pwm {
status = "okay";
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci_0 {
bus-width = <8>;
non-removable;

36
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -102,6 +102,8 @@ l2c: cache-controller@10502000 {
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
prefetch-data = <1>;
prefetch-instr = <1>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <2 2 1>;
};
@ -363,26 +365,24 @@ opp-200000000 {
};
};
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
&cpu_alert0 {
temperature = <85000>; /* millicelsius */
};
trips {
cpu_alert0: cpu-alert-0 {
temperature = <85000>; /* millicelsius */
};
cpu_alert1: cpu-alert-1 {
temperature = <100000>; /* millicelsius */
};
cpu_alert2: cpu-alert-2 {
temperature = <110000>; /* millicelsius */
};
};
};
};
&cpu_alert1 {
temperature = <100000>; /* millicelsius */
};
&cpu_alert2 {
temperature = <110000>; /* millicelsius */
};
&cpu_thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
};
&gic {

42
arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi
View File

@ -33,7 +33,7 @@ flash-led {
};
};
lcd_vdd3_reg: voltage-regulator-7 {
lcd_vdd3_reg: voltage-regulator-10 {
compatible = "regulator-fixed";
regulator-name = "LCD_VDD_2.2V";
regulator-min-microvolt = <2200000>;
@ -42,7 +42,7 @@ lcd_vdd3_reg: voltage-regulator-7 {
enable-active-high;
};
ps_als_reg: voltage-regulator-8 {
ps_als_reg: voltage-regulator-11 {
compatible = "regulator-fixed";
regulator-name = "LED_A_3.0V";
regulator-min-microvolt = <3000000>;
@ -171,6 +171,44 @@ &s5c73m3 {
status = "okay";
};
&sound {
samsung,audio-routing =
"HP", "HPOUT1L",
"HP", "HPOUT1R",
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"SPK", "SPKOUTRN",
"SPK", "SPKOUTRP",
"RCV", "HPOUT2N",
"RCV", "HPOUT2P",
"HDMI", "LINEOUT1N",
"HDMI", "LINEOUT1P",
"LINE", "LINEOUT2N",
"LINE", "LINEOUT2P",
"IN1LP", "MICBIAS1",
"IN1LN", "MICBIAS1",
"Main Mic", "MICBIAS1",
"IN1RP", "Sub Mic",
"IN1RN", "Sub Mic",
"IN2LP:VXRN", "MICBIAS2",
"Headset Mic", "MICBIAS2",
"IN2RN", "FM In",
"IN2RP:VXRP", "FM In";
};
&submic_bias_reg {
gpio = <&gpf2 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&touchkey_reg {
gpio = <&gpm0 0 GPIO_ACTIVE_HIGH>;
status = "okay";

6
arch/arm/boot/dts/exynos4412-i9300.dts
View File

@ -17,6 +17,10 @@ / {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
};
};
&sound {
fm-sel-gpios = <&gpl0 3 GPIO_ACTIVE_HIGH>;
};

2
arch/arm/boot/dts/exynos4412-i9305.dts
View File

@ -10,7 +10,7 @@ / {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
reg = <0x40000000 0x80000000>;
};
};

116
arch/arm/boot/dts/exynos4412-midas.dtsi
View File

@ -37,12 +37,12 @@ firmware@204f000 {
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti", "fixed-clock";
compatible = "samsung,clock-xxti";
clock-frequency = <0>;
};
xusbxti {
compatible = "samsung,clock-xusbxti", "fixed-clock";
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
@ -102,6 +102,30 @@ touchkey_reg: voltage-regulator-6 {
status = "disabled";
};
vbatt_reg: voltage-regulator-7 {
compatible = "regulator-fixed";
regulator-name = "VBATT";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
mic_bias_reg: voltage-regulator-8 {
compatible = "regulator-fixed";
regulator-name = "MICBIAS_LDO_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpf1 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
submic_bias_reg: voltage-regulator-9 {
compatible = "regulator-fixed";
regulator-name = "SUB_MICBIAS_LDO_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@ -266,16 +290,18 @@ wlan_pwrseq: sdhci3-pwrseq {
clock-names = "ext_clock";
};
sound {
compatible = "samsung,trats2-audio";
samsung,i2s-controller = <&i2s0>;
samsung,model = "Trats2";
samsung,audio-codec = <&wm1811>;
samsung,audio-routing =
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"SPK", "SPKOUTRN",
"SPK", "SPKOUTRP";
sound: sound {
compatible = "samsung,midas-audio";
model = "Midas";
mic-bias-supply = <&mic_bias_reg>;
submic-bias-supply = <&submic_bias_reg>;
cpu {
sound-dai = <&i2s0 0>;
};
codec {
sound-dai = <&wm1811>;
};
};
thermistor-ap {
@ -293,25 +319,6 @@ thermistor-battery {
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 2>; /* Battery temperature */
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>,
<&cpu1 13 13>,
<&cpu2 13 13>,
<&cpu3 13 13>;
};
};
};
};
};
&adc {
@ -380,6 +387,21 @@ &cpu0 {
cpu0-supply = <&buck2_reg>;
};
&cpu_thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
<&cpu2 13 13>, <&cpu3 13 13>;
};
};
};
&csis_0 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
@ -597,11 +619,37 @@ &i2c_4 {
wm1811: wm1811@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>;
clock-names = "MCLK1";
DCVDD-supply = <&ldo3_reg>;
clocks = <&pmu_system_controller 0>,
<&max77686 MAX77686_CLK_PMIC>;
clock-names = "MCLK1", "MCLK2";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gpx3>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
#sound-dai-cells = <0>;
wlf,gpio-cfg = <0x3 0x0 0x0 0x0 0x0 0x0
0x0 0x8000 0x0 0x0 0x0>;
wlf,micbias-cfg = <0x2f 0x2b>;
wlf,lineout1-feedback;
wlf,lineout1-se;
wlf,lineout2-se;
wlf,ldoena-always-driven;
AVDD2-supply = <&vbatt_reg>;
DBVDD1-supply = <&ldo3_reg>;
DBVDD2-supply = <&vbatt_reg>;
DBVDD3-supply = <&vbatt_reg>;
DCVDD-supply = <&ldo3_reg>;
CPVDD-supply = <&vbatt_reg>;
SPKVDD1-supply = <&vbatt_reg>;
SPKVDD2-supply = <&vbatt_reg>;
wlf,ldo1ena = <&gpj0 4 0>;
wlf,ldo2ena = <&gpj0 4 0>;
};
};

39
arch/arm/boot/dts/exynos4412-n710x.dts
View File

@ -8,12 +8,12 @@ / {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
reg = <0x40000000 0x80000000>;
};
/* bootargs are passed in by bootloader */
cam_vdda_reg: voltage-regulator-7 {
cam_vdda_reg: voltage-regulator-10 {
compatible = "regulator-fixed";
regulator-name = "CAM_SENSOR_CORE_1.2V";
regulator-min-microvolt = <1200000>;
@ -74,6 +74,41 @@ &s5c73m3 {
status = "okay";
};
&sound {
samsung,audio-routing =
"HP", "HPOUT1L",
"HP", "HPOUT1R",
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"RCV", "HPOUT2N",
"RCV", "HPOUT2P",
"HDMI", "LINEOUT1N",
"HDMI", "LINEOUT1P",
"LINE", "LINEOUT2N",
"LINE", "LINEOUT2P",
"IN1LP", "MICBIAS2",
"IN1LN", "MICBIAS2",
"Headset Mic", "MICBIAS2",
"IN1RP", "Sub Mic",
"IN1RN", "Sub Mic",
"IN2LP:VXRN", "Main Mic",
"IN2LN", "Main Mic",
"IN2RN", "FM In",
"IN2RP:VXRP", "FM In";
};
&submic_bias_reg {
regulator-always-on;
};
&touchkey_reg {
gpio = <&gpm0 5 GPIO_ACTIVE_HIGH>;
status = "okay";

34
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View File

@ -66,25 +66,6 @@ xusbxti {
clock-frequency = <24000000>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
cooling_map0: map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
cooling_map1: map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>,
<&cpu1 13 13>,
<&cpu2 13 13>,
<&cpu3 13 13>;
};
};
};
};
};
&bus_dmc {
@ -174,6 +155,21 @@ opp-800000000 {
};
};
&cpu_thermal {
cooling-maps {
cooling_map0: map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
cooling_map1: map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
<&cpu2 13 13>, <&cpu3 13 13>;
};
};
};
&pinctrl_1 {
gpio_power_key: power_key {
samsung,pins = "gpx1-3";

46
arch/arm/boot/dts/exynos4412-odroidu3.dts
View File

@ -37,31 +37,6 @@ fan0: pwm-fan {
#cooling-cells = <2>;
cooling-levels = <0 102 170 230>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
trip = <&cpu_alert1>;
cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
<&cpu2 9 9>, <&cpu3 9 9>,
<&fan0 1 2>;
};
map1 {
trip = <&cpu_alert2>;
cooling-device = <&cpu0 15 15>,
<&cpu1 15 15>,
<&cpu2 15 15>,
<&cpu3 15 15>,
<&fan0 2 3>;
};
map2 {
trip = <&cpu_alert0>;
cooling-device = <&fan0 0 1>;
};
};
};
};
};
&adc {
@ -76,6 +51,27 @@ &buck8_reg {
regulator-max-microvolt = <3300000>;
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_alert1>;
cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
<&cpu2 9 9>, <&cpu3 9 9>,
<&fan0 1 2>;
};
map1 {
trip = <&cpu_alert2>;
cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
<&cpu2 15 15>, <&cpu3 15 15>,
<&fan0 2 3>;
};
map2 {
trip = <&cpu_alert0>;
cooling-device = <&fan0 0 1>;
};
};
};
&hdmicec {
needs-hpd;
};

25
arch/arm/boot/dts/exynos4412-origen.dts
View File

@ -11,6 +11,7 @@
/dts-v1/;
#include "exynos4412.dtsi"
#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "exynos-mfc-reserved-memory.dtsi"
@ -74,6 +75,21 @@ &cpu0 {
cpu0-supply = <&buck2_reg>;
};
&cpu_thermal {
cooling-maps {
cooling_map0: map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
cooling_map1: map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
<&cpu2 13 13>, <&cpu3 13 13>;
};
};
};
&exynos_usbphy {
status = "okay";
};
@ -129,6 +145,13 @@ s5m8767_pmic@66 {
<1200000>, <1200000>,
<1200000>, <1200000>;
s5m8767_osc: clocks {
compatible = "samsung,s5m8767-clk";
#clock-cells = <1>;
clock-output-names = "s5m8767_ap", "s5m8767_cp",
"s5m8767_bt";
};
regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ALIVE";
@ -499,6 +522,8 @@ keypad_cols: keypad-cols {
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&sdhci_2 {

27
arch/arm/boot/dts/exynos4412-smdk4412.dts
View File

@ -37,6 +37,28 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
&cpu_thermal {
cooling-maps {
cooling_map0: map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
cooling_map1: map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
<&cpu2 13 13>, <&cpu3 13 13>;
};
};
};
@ -127,6 +149,11 @@ keypad_cols: keypad-cols {
};
};
&rtc {
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;

24
arch/arm/boot/dts/exynos4412-tiny4412.dts
View File

@ -65,6 +65,13 @@ xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
panel {
@ -78,6 +85,21 @@ panel_input: endpoint {
};
};
&cpu_thermal {
cooling-maps {
cooling_map0: map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
<&cpu2 7 7>, <&cpu3 7 7>;
};
cooling_map1: map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
<&cpu2 13 13>, <&cpu3 13 13>;
};
};
};
&fimd {
pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
pinctrl-names = "default";
@ -95,6 +117,8 @@ lcdc_output: endpoint {
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci_2 {

2
arch/arm/boot/dts/exynos4412-trats2.dts
View File

@ -18,7 +18,7 @@ / {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
};
chosen {

2
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -218,6 +218,8 @@ l2c: cache-controller@10502000 {
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
prefetch-data = <1>;
prefetch-instr = <1>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <3 2 1>;
arm,double-linefill = <1>;

10
arch/arm/boot/dts/exynos5.dtsi
View File

@ -86,7 +86,7 @@ combiner: interrupt-controller@10440000 {
};
gic: interrupt-controller@10481000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic", "arm,cortex-a9-gic";
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
@ -211,13 +211,13 @@ sss: sss@10830000 {
};
prng: rng@10830400 {
compatible = "samsung,exynos5250-prng";
reg = <0x10830400 0x200>;
compatible = "samsung,exynos5250-prng";
reg = <0x10830400 0x200>;
};
trng: rng@10830600 {
compatible = "samsung,exynos5250-trng";
reg = <0x10830600 0x100>;
compatible = "samsung,exynos5250-trng";
reg = <0x10830600 0x100>;
};
g2d: g2d@10850000 {

20
arch/arm/boot/dts/exynos5250-arndale.dts
View File

@ -243,11 +243,11 @@ s5m8767_pmic@66 {
s5m8767,pmic-buck3-dvs-voltage = <1100000>;
s5m8767,pmic-buck4-dvs-voltage = <1200000>;
s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_HIGH>,
<&gpd1 1 GPIO_ACTIVE_HIGH>,
<&gpd1 2 GPIO_ACTIVE_HIGH>;
<&gpd1 1 GPIO_ACTIVE_HIGH>,
<&gpd1 2 GPIO_ACTIVE_HIGH>;
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>,
<&gpx2 4 GPIO_ACTIVE_HIGH>,
<&gpx2 5 GPIO_ACTIVE_HIGH>;
<&gpx2 4 GPIO_ACTIVE_HIGH>,
<&gpx2 5 GPIO_ACTIVE_HIGH>;
s5m8767_osc: clocks {
compatible = "samsung,s5m8767-clk";
@ -542,12 +542,6 @@ &i2c_9 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
samsung,i2c-slave-addr = <0x38>;
sata_phy_i2c:sata-phy@38 {
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
};
};
&i2s0 {
@ -619,12 +613,16 @@ &sata_phy {
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};
&sata_phy_i2c {
status = "okay";
};
&soc {
/*
* For unknown reasons HDMI-DDC does not work with Exynos I2C
* controllers. Lets use software I2C over GPIO pins as a workaround.
*/
i2c_ddc: i2c-gpio {
i2c_ddc: i2c-10 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_gpio_bus>;
status = "okay";

16
arch/arm/boot/dts/exynos5250-smdk5250.dts
View File

@ -7,6 +7,7 @@
*/
/dts-v1/;
#include <dt-bindings/clock/maxim,max77686.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "exynos5250.dtsi"
@ -129,13 +130,14 @@ eeprom@50 {
reg = <0x50>;
};
max77686@9 {
max77686: pmic@9 {
compatible = "maxim,max77686";
reg = <0x09>;
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&max77686_irq>;
#clock-cells = <1>;
wakeup-source;
voltage-regulators {
@ -324,12 +326,6 @@ &i2c_9 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
samsung,i2c-slave-addr = <0x38>;
sata_phy_i2c: sata-phy@38 {
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
};
};
&i2s0 {
@ -368,6 +364,8 @@ &mmc_2 {
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&sata {
@ -379,6 +377,10 @@ &sata_phy {
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};
&sata_phy_i2c {
status = "okay";
};
&spi_1 {
status = "okay";
cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;

41
arch/arm/boot/dts/exynos5250-spring.dts
View File

@ -7,6 +7,7 @@
*/
/dts-v1/;
#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
@ -114,12 +115,12 @@ s5m8767-pmic@66 {
wakeup-source;
s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
<&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
<&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
<&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
<&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
<&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
<&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
<&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
<&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
/*
* The following arrays of DVS voltages are not used, since we are
@ -127,26 +128,26 @@ s5m8767-pmic@66 {
* to please the driver.
*/
s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
<1250000>, <1200000>,
<1150000>, <1100000>,
<1000000>, <950000>;
<1250000>, <1200000>,
<1150000>, <1100000>,
<1000000>, <950000>;
s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
<1100000>, <1100000>,
<1000000>, <1000000>,
<1000000>, <1000000>;
<1100000>, <1100000>,
<1000000>, <1000000>,
<1000000>, <1000000>;
s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
<1200000>, <1200000>,
<1200000>, <1200000>,
<1200000>, <1200000>;
<1200000>, <1200000>,
<1200000>, <1200000>,
<1200000>, <1200000>;
clocks {
s5m8767_osc: clocks {
compatible = "samsung,s5m8767-clk";
#clock-cells = <1>;
clock-output-names = "en32khz_ap",
"en32khz_cp",
"en32khz_bt";
"en32khz_cp",
"en32khz_bt";
};
regulators {
@ -456,7 +457,7 @@ s5m8767_dvs: s5m8767-dvs {
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
dp_hpd_gpio: dp-hpd-gpio {
dp_hpd_gpio: dp-hpd {
samsung,pins = "gpc3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
@ -522,6 +523,12 @@ hsic_reset: hsic-reset {
};
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&sd1_bus4 {
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};

52
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -473,6 +473,12 @@ i2c_9: i2c@121d0000 {
clocks = <&clock CLK_SATA_PHYI2C>;
clock-names = "i2c";
status = "disabled";
sata_phy_i2c: sata-phy-i2c@38 {
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
status = "disabled";
};
};
spi_0: spi@12d20000 {
@ -723,7 +729,7 @@ mdma1: mdma@11c10000 {
#dma-requests = <1>;
};
gsc_0: gsc@13e00000 {
gsc_0: gsc@13e00000 {
compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -733,7 +739,7 @@ gsc_0: gsc@13e00000 {
iommus = <&sysmmu_gsc0>;
};
gsc_1: gsc@13e10000 {
gsc_1: gsc@13e10000 {
compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
reg = <0x13e10000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@ -743,7 +749,7 @@ gsc_1: gsc@13e10000 {
iommus = <&sysmmu_gsc1>;
};
gsc_2: gsc@13e20000 {
gsc_2: gsc@13e20000 {
compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
reg = <0x13e20000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@ -753,7 +759,7 @@ gsc_2: gsc@13e20000 {
iommus = <&sysmmu_gsc2>;
};
gsc_3: gsc@13e30000 {
gsc_3: gsc@13e30000 {
compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
reg = <0x13e30000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
@ -1085,26 +1091,6 @@ sysmmu_tv: sysmmu@14650000 {
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 9 9>, <&cpu1 9 9>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 15 15>,
<&cpu1 15 15>;
};
};
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@ -1120,6 +1106,24 @@ timer {
};
};
&cpu_thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 9 9>, <&cpu1 9 9>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 15 15>,
<&cpu1 15 15>;
};
};
};
&dp {
power-domains = <&pd_disp1>;
clocks = <&clock CLK_DP>;

4
arch/arm/boot/dts/exynos5260.dtsi
View File

@ -162,10 +162,8 @@ clock_disp: clock-controller@14550000 {
};
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x2000>,

8
arch/arm/boot/dts/exynos5410-odroidxu.dts
View File

@ -109,10 +109,10 @@ &clock_audss {
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<96000000>,
<19200000>;
assigned-clock-rates = <0>,
<0>,
<96000000>,
<19200000>;
};
&cpu0_thermal {

12
arch/arm/boot/dts/exynos5410-smdk5410.dts
View File

@ -29,6 +29,13 @@ fin_pll: xxti {
#clock-cells = <0>;
};
pmic_ap_clk: pmic-ap-clk {
/* Workaround for missing PMIC and its clock */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
firmware@2037000 {
compatible = "samsung,secure-firmware";
reg = <0x02037000 0x1000>;
@ -79,6 +86,11 @@ srom_ebi: srom-ebi {
};
};
&rtc {
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sromc {
pinctrl-names = "default";
pinctrl-0 = <&srom_ctl>, <&srom_ebi>;

12
arch/arm/boot/dts/exynos5410.dtsi
View File

@ -238,16 +238,16 @@ cpu0_thermal: cpu0-thermal {
#include "exynos5420-trip-points.dtsi"
};
cpu1_thermal: cpu1-thermal {
thermal-sensors = <&tmu_cpu1>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_cpu1>;
#include "exynos5420-trip-points.dtsi"
};
cpu2_thermal: cpu2-thermal {
thermal-sensors = <&tmu_cpu2>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_cpu2>;
#include "exynos5420-trip-points.dtsi"
};
cpu3_thermal: cpu3-thermal {
thermal-sensors = <&tmu_cpu3>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_cpu3>;
#include "exynos5420-trip-points.dtsi"
};
};
};

3
arch/arm/boot/dts/exynos5420-smdk5420.dts
View File

@ -9,6 +9,7 @@
/dts-v1/;
#include "exynos5420.dtsi"
#include "exynos5420-cpus.dtsi"
#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/gpio/gpio.h>
/ {
@ -401,6 +402,8 @@ usb301_vbus_en: usb301-vbus-en {
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&usbdrd_phy0 {

16
arch/arm/boot/dts/exynos5420.dtsi
View File

@ -1199,20 +1199,20 @@ cpu0_thermal: cpu0-thermal {
#include "exynos5420-trip-points.dtsi"
};
cpu1_thermal: cpu1-thermal {
thermal-sensors = <&tmu_cpu1>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_cpu1>;
#include "exynos5420-trip-points.dtsi"
};
cpu2_thermal: cpu2-thermal {
thermal-sensors = <&tmu_cpu2>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_cpu2>;
#include "exynos5420-trip-points.dtsi"
};
cpu3_thermal: cpu3-thermal {
thermal-sensors = <&tmu_cpu3>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_cpu3>;
#include "exynos5420-trip-points.dtsi"
};
gpu_thermal: gpu-thermal {
thermal-sensors = <&tmu_gpu>;
#include "exynos5420-trip-points.dtsi"
thermal-sensors = <&tmu_gpu>;
#include "exynos5420-trip-points.dtsi"
};
};
};

4
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
View File

@ -333,8 +333,8 @@ samsung_K3QF2F20DB: lpddr3 {
compatible = "samsung,K3QF2F20DB", "jedec,lpddr3";
density = <16384>;
io-width = <32>;
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
tRFC-min-tck = <17>;
tRRD-min-tck = <2>;

60
arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
View File

@ -29,30 +29,6 @@ sound: sound {
"HiFi Playback", "Mixer DAI TX",
"Mixer DAI RX", "HiFi Capture";
assigned-clocks = <&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_DOUT_I2S>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<0>,
<0>,
<0>,
<196608001>,
<(196608002 / 2)>,
<196608000>;
cpu {
sound-dai = <&i2s0 0>, <&i2s0 1>;
};
@ -62,13 +38,6 @@ codec {
};
};
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
<&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <(196608000 / 256)>,
<196608000>;
};
&hsi2c_5 {
status = "okay";
max98090: max98090@10 {
@ -84,6 +53,31 @@ max98090: max98090@10 {
&i2s0 {
status = "okay";
assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
assigned-clocks = <&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&i2s0 CLK_I2S_RCLK_SRC>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_DOUT_I2S>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_SCLK_I2S>;
assigned-clock-rates = <0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<196608001>,
<(196608002 / 2)>,
<196608000>;
};

10
arch/arm/boot/dts/s5pv210-aries.dtsi
View File

@ -47,6 +47,11 @@ mfc_right: region@51000000 {
};
};
bt_codec: bt_sco {
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
};
vibrator_pwr: regulator-fixed-0 {
compatible = "regulator-fixed";
regulator-name = "vibrator-en";
@ -624,6 +629,11 @@ touchscreen@4a {
};
};
&i2s0 {
dmas = <&pdma0 9>, <&pdma0 10>, <&pdma0 11>;
status = "okay";
};
&mfc {
memory-region = <&mfc_left>, <&mfc_right>;
};

98
arch/arm/boot/dts/s5pv210-fascinate4g.dts
View File

@ -35,6 +35,80 @@ vol-up {
linux,code = <KEY_VOLUMEUP>;
};
};
headset_micbias_reg: regulator-fixed-3 {
compatible = "regulator-fixed";
regulator-name = "Headset_Micbias";
gpio = <&gpj2 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&headset_micbias_ena>;
};
main_micbias_reg: regulator-fixed-4 {
compatible = "regulator-fixed";
regulator-name = "Main_Micbias";
gpio = <&gpj4 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&main_micbias_ena>;
};
sound {
compatible = "samsung,fascinate4g-wm8994";
model = "Fascinate4G";
extcon = <&fsa9480>;
main-micbias-supply = <&main_micbias_reg>;
headset-micbias-supply = <&headset_micbias_reg>;
earpath-sel-gpios = <&gpj2 6 GPIO_ACTIVE_HIGH>;
io-channels = <&adc 3>;
io-channel-names = "headset-detect";
headset-detect-gpios = <&gph0 6 GPIO_ACTIVE_HIGH>;
headset-key-gpios = <&gph3 6 GPIO_ACTIVE_HIGH>;
samsung,audio-routing =
"HP", "HPOUT1L",
"HP", "HPOUT1R",
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"RCV", "HPOUT2N",
"RCV", "HPOUT2P",
"LINE", "LINEOUT2N",
"LINE", "LINEOUT2P",
"IN1LP", "Main Mic",
"IN1LN", "Main Mic",
"IN1RP", "Headset Mic",
"IN1RN", "Headset Mic",
"Modem Out", "Modem TX",
"Modem RX", "Modem In",
"Bluetooth SPK", "TX",
"RX", "Bluetooth Mic";
pinctrl-names = "default";
pinctrl-0 = <&headset_det &earpath_sel>;
cpu {
sound-dai = <&i2s0>, <&bt_codec>;
};
codec {
sound-dai = <&wm8994>;
};
};
};
&fg {
@ -51,6 +125,12 @@ &pinctrl0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep_cfg>;
headset_det: headset-det {
samsung,pins = "gph0-6", "gph3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
fg_irq: fg-irq {
samsung,pins = "gph3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
@ -58,6 +138,24 @@ fg_irq: fg-irq {
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
headset_micbias_ena: headset-micbias-ena {
samsung,pins = "gpj2-5";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
earpath_sel: earpath-sel {
samsung,pins = "gpj2-6";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
main_micbias_ena: main-micbias-ena {
samsung,pins = "gpj4-2";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
/* Based on vendor kernel v2.6.35.7 */
sleep_cfg: sleep-cfg {
PIN_SLP(gpa0-0, PREV, NONE);

85
arch/arm/boot/dts/s5pv210-galaxys.dts
View File

@ -72,6 +72,73 @@ fmradio@10 {
pinctrl-0 = <&fm_irq &fm_rst>;
};
};
micbias_reg: regulator-fixed-3 {
compatible = "regulator-fixed";
regulator-name = "MICBIAS";
gpio = <&gpj4 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&micbias_reg_ena>;
};
sound {
compatible = "samsung,aries-wm8994";
model = "Aries";
extcon = <&fsa9480>;
main-micbias-supply = <&micbias_reg>;
headset-micbias-supply = <&micbias_reg>;
earpath-sel-gpios = <&gpj2 6 GPIO_ACTIVE_HIGH>;
io-channels = <&adc 3>;
io-channel-names = "headset-detect";
headset-detect-gpios = <&gph0 6 GPIO_ACTIVE_LOW>;
headset-key-gpios = <&gph3 6 GPIO_ACTIVE_HIGH>;
samsung,audio-routing =
"HP", "HPOUT1L",
"HP", "HPOUT1R",
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"RCV", "HPOUT2N",
"RCV", "HPOUT2P",
"LINE", "LINEOUT2N",
"LINE", "LINEOUT2P",
"IN1LP", "Main Mic",
"IN1LN", "Main Mic",
"IN1RP", "Headset Mic",
"IN1RN", "Headset Mic",
"IN2LN", "FM In",
"IN2RN", "FM In",
"Modem Out", "Modem TX",
"Modem RX", "Modem In",
"Bluetooth SPK", "TX",
"RX", "Bluetooth Mic";
pinctrl-names = "default";
pinctrl-0 = <&headset_det &earpath_sel>;
cpu {
sound-dai = <&i2s0>, <&bt_codec>;
};
codec {
sound-dai = <&wm8994>;
};
};
};
&aliases {
@ -88,6 +155,12 @@ fm_i2c_pins: fm-i2c-pins {
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
headset_det: headset-det {
samsung,pins = "gph0-6", "gph3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
fm_irq: fm-irq {
samsung,pins = "gpj2-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
@ -102,6 +175,12 @@ fm_rst: fm-rst {
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
earpath_sel: earpath-sel {
samsung,pins = "gpj2-6";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
massmemory_en: massmemory-en {
samsung,pins = "gpj2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
@ -109,6 +188,12 @@ massmemory_en: massmemory-en {
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
micbias_reg_ena: micbias-reg-ena {
samsung,pins = "gpj4-2";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
/* Based on CyanogenMod 3.0.101 kernel */
sleep_cfg: sleep-cfg {
PIN_SLP(gpa0-0, PREV, NONE);