arm64: dts: qcom: msm8953: rename labels for DSI nodes

Currently in board files MDSS and DSI nodes stay apart, because labels
for DSI nodes do not have the mdss_ prefix. It was found that grouping
all display-related notes is more useful.

To keep all display-related nodes close in the board files, change DSI
node labels from dsi_* to mdss_dsi_*.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-6-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov 2023-05-31 04:16:14 +03:00 committed by Bjorn Andersson
parent f82c8d2f00
commit 8b87d0585c

View File

@ -764,10 +764,10 @@ gcc: clock-controller@1800000 {
#power-domain-cells = <1>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&sleep_clk>,
<&dsi0_phy 1>,
<&dsi0_phy 0>,
<&dsi1_phy 1>,
<&dsi1_phy 0>;
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi1_phy 1>,
<&mdss_dsi1_phy 0>;
clock-names = "xo",
"sleep",
"dsi0pll",
@ -849,20 +849,20 @@ ports {
port@0 {
reg = <0>;
mdp5_intf1_out: endpoint {
remote-endpoint = <&dsi0_in>;
remote-endpoint = <&mdss_dsi0_in>;
};
};
port@1 {
reg = <1>;
mdp5_intf2_out: endpoint {
remote-endpoint = <&dsi1_in>;
remote-endpoint = <&mdss_dsi1_in>;
};
};
};
};
dsi0: dsi@1a94000 {
mdss_dsi0: dsi@1a94000 {
compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x01a94000 0x400>;
reg-names = "dsi_ctrl";
@ -872,8 +872,8 @@ dsi0: dsi@1a94000 {
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi0_phy 0>,
<&dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
@ -888,7 +888,7 @@ dsi0: dsi@1a94000 {
"pixel",
"core";
phys = <&dsi0_phy>;
phys = <&mdss_dsi0_phy>;
#address-cells = <1>;
#size-cells = <0>;
@ -901,20 +901,20 @@ ports {
port@0 {
reg = <0>;
dsi0_in: endpoint {
mdss_dsi0_in: endpoint {
remote-endpoint = <&mdp5_intf1_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
mdss_dsi0_out: endpoint {
};
};
};
};
dsi0_phy: phy@1a94400 {
mdss_dsi0_phy: phy@1a94400 {
compatible = "qcom,dsi-phy-14nm-8953";
reg = <0x01a94400 0x100>,
<0x01a94500 0x300>,
@ -932,7 +932,7 @@ dsi0_phy: phy@1a94400 {
status = "disabled";
};
dsi1: dsi@1a96000 {
mdss_dsi1: dsi@1a96000 {
compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x01a96000 0x400>;
reg-names = "dsi_ctrl";
@ -942,8 +942,8 @@ dsi1: dsi@1a96000 {
assigned-clocks = <&gcc BYTE1_CLK_SRC>,
<&gcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&dsi1_phy 0>,
<&dsi1_phy 1>;
assigned-clock-parents = <&mdss_dsi1_phy 0>,
<&mdss_dsi1_phy 1>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
@ -958,7 +958,7 @@ dsi1: dsi@1a96000 {
"pixel",
"core";
phys = <&dsi1_phy>;
phys = <&mdss_dsi1_phy>;
status = "disabled";
@ -968,20 +968,20 @@ ports {
port@0 {
reg = <0>;
dsi1_in: endpoint {
mdss_dsi1_in: endpoint {
remote-endpoint = <&mdp5_intf2_out>;
};
};
port@1 {
reg = <1>;
dsi1_out: endpoint {
mdss_dsi1_out: endpoint {
};
};
};
};
dsi1_phy: phy@1a96400 {
mdss_dsi1_phy: phy@1a96400 {
compatible = "qcom,dsi-phy-14nm-8953";
reg = <0x01a96400 0x100>,
<0x01a96500 0x300>,