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drm/amdgpu: Fix AMDGPU_GTT_MAX_TRANSFER_SIZE for non-4K systems
Running RCCL unit tests on a system with a 64K PAGE_SIZE triggers the following warning and causes the test to terminate on latest upstream kernel: WARNING: drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:1335 at amdgpu_bo_release_notify+0x1bc/0x280 [amdgpu], CPU#18: rccl-UnitTests/33151 Call trace: amdgpu_bo_release_notify ttm_bo_release amdgpu_gem_object_free drm_gem_object_free amdgpu_bo_unref amdgpu_bo_create amdgpu_bo_create_user amdgpu_gem_object_create amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu kfd_ioctl_alloc_memory_of_gpu kfd_ioctl sys_ioctl The warning is triggered because amdgpu_ttm_next_clear_entity() returns NULL when a clear buffer operation is requested. This happens because the GART window allocation for the default_entity, clear_entity and move_entity fails during initialization. Commit [1] introduced separate GART windows for the default_entity, clear_entity and move_entity of each SDMA instance. Their sizes are derived from AMDGPU_GTT_MAX_TRANSFER_SIZE, which is currently defined as 1024 pages. This implicitly assumes a 4K PAGE_SIZE, where 1024 pages correspond to a 4MB transfer. On a 64K PAGE_SIZE system, however, the same value expands to 64MB. The default_entity and clear_entity each allocate one AMDGPU_GTT_MAX_TRANSFER_SIZE GART window, while the move_entity allocates two such windows. This results in 16MB of GART space per SDMA instance on a 4K PAGE_SIZE system, but 256MB per SDMA instance on a 64K PAGE_SIZE system. On an MI210 system with five SDMA instances and a 512MB GART aperture, the total GART space required becomes 1.25GB, exceeding the available GART aperture. Consequently, GART window allocation fails, amdgpu_ttm_next_clear_entity() returns NULL, and the above warning is triggered. Redefine AMDGPU_GTT_MAX_TRANSFER_SIZE in bytes instead of page units. Where a page count is required, convert it using PAGE_SHIFT. This preserves the existing 4MB transfer size across all PAGE_SIZE configurations while keeping GART window allocations within the available GART aperture. [1] https://lore.kernel.org/all/20260408100327.1372-3-pierre-eric.pelloux-prayer@amd.com/#t Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5435 Fixes:897ee11ec0("drm/amdgpu: create multiple clear/move ttm entities") Signed-off-by: Donet Tom <donettom@linux.ibm.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit27213b776a) Cc: stable@vger.kernel.org
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8b7033c0c5
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@ -208,9 +208,10 @@ static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
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void *cpu_addr;
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uint64_t flags;
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int r;
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const u64 GTT_MAX_PAGES = (AMDGPU_GTT_MAX_TRANSFER_SIZE >> PAGE_SHIFT);
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BUG_ON(adev->mman.buffer_funcs->copy_max_bytes <
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AMDGPU_GTT_MAX_TRANSFER_SIZE * 8);
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GTT_MAX_PAGES * AMDGPU_GPU_PAGES_IN_CPU_PAGE * 8);
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if (WARN_ON(mem->mem_type == AMDGPU_PL_PREEMPT))
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return -EINVAL;
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@ -230,7 +231,7 @@ static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
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offset = mm_cur->start & ~PAGE_MASK;
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num_pages = PFN_UP(*size + offset);
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num_pages = min_t(uint32_t, num_pages, AMDGPU_GTT_MAX_TRANSFER_SIZE);
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num_pages = min_t(uint32_t, num_pages, GTT_MAX_PAGES);
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*size = min(*size, (uint64_t)num_pages * PAGE_SIZE - offset);
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@ -2033,6 +2034,7 @@ static int amdgpu_ttm_buffer_entity_init(struct amdgpu_gtt_mgr *mgr,
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u32 num_gart_windows)
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{
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int i, r, num_pages;
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const u64 GTT_MAX_PAGES = (AMDGPU_GTT_MAX_TRANSFER_SIZE >> PAGE_SHIFT);
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r = drm_sched_entity_init(&entity->base, prio, scheds, num_schedulers, NULL);
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if (r)
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@ -2045,7 +2047,7 @@ static int amdgpu_ttm_buffer_entity_init(struct amdgpu_gtt_mgr *mgr,
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if (num_gart_windows == 0)
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return 0;
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num_pages = num_gart_windows * AMDGPU_GTT_MAX_TRANSFER_SIZE;
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num_pages = num_gart_windows * GTT_MAX_PAGES;
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r = amdgpu_gtt_mgr_alloc_entries(mgr, &entity->gart_node, num_pages,
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DRM_MM_INSERT_BEST);
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if (r) {
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@ -2056,7 +2058,7 @@ static int amdgpu_ttm_buffer_entity_init(struct amdgpu_gtt_mgr *mgr,
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for (i = 0; i < num_gart_windows; i++) {
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entity->gart_window_offs[i] =
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amdgpu_gtt_node_to_byte_offset(&entity->gart_node) +
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i * AMDGPU_GTT_MAX_TRANSFER_SIZE * PAGE_SIZE;
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i * GTT_MAX_PAGES * PAGE_SIZE;
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}
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return 0;
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@ -39,7 +39,7 @@
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#define AMDGPU_PL_MMIO_REMAP (TTM_PL_PRIV + 5)
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#define __AMDGPU_PL_NUM (TTM_PL_PRIV + 6)
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#define AMDGPU_GTT_MAX_TRANSFER_SIZE 1024
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#define AMDGPU_GTT_MAX_TRANSFER_SIZE (1ULL << 22)
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extern const struct attribute_group amdgpu_vram_mgr_attr_group;
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extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
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@ -128,7 +128,7 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *adev, dma_addr_t *sys,
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enum MIGRATION_COPY_DIR direction,
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struct dma_fence **mfence)
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{
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const u64 GTT_MAX_PAGES = AMDGPU_GTT_MAX_TRANSFER_SIZE;
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const u64 GTT_MAX_PAGES = (AMDGPU_GTT_MAX_TRANSFER_SIZE >> PAGE_SHIFT);
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struct amdgpu_ring *ring;
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struct amdgpu_ttm_buffer_entity *entity;
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u64 gart_s, gart_d;
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