github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-11-09 13:44:03 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

pinctrl: sunxi: rename SUNXI_PINCTRL_NEW_REG_LAYOUT

Browse Source 
After keeping the pinctrl IP mostly register compatible for almost a
decade, in 2021 Allwinner introduced some changes to the register
layout, which made us use a flag called SUNXI_PINCTRL_NEW_REG_LAYOUT.
Now with their latest SoC (A733), Allwinner changed the pinctrl IP
again, so "NEW" isn't really a fitting name anymore.

Rename the symbol to SUNXI_PINCTRL_NCAT2_REG_LAYOUT, with "NCAT2" being
a name often used in vendor source code to signify this "new" generation
of SoCs.

Just a rename of the symbol, no actual code changes.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Andre Przywara 2026-09-10 15:35:12 +02:00 committed by Linus Walleij
parent 01f20711d0
commit 8b6c66cfd1
5 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
View File

@ -821,7 +821,7 @@ static const struct sunxi_pinctrl_desc d1_pinctrl_data = {
static int d1_pinctrl_probe(struct platform_device *pdev)
{
return sunxi_pinctrl_init_with_flags(pdev, &d1_pinctrl_data,
SUNXI_PINCTRL_NEW_REG_LAYOUT);
SUNXI_PINCTRL_NCAT2_REG_LAYOUT);
}
static const struct of_device_id d1_pinctrl_match[] = {

2
drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
View File

@ -35,7 +35,7 @@ static int a523_r_pinctrl_probe(struct platform_device *pdev)
return sunxi_pinctrl_dt_table_init(pdev, a523_r_nr_bank_pins,
a523_r_irq_bank_muxes,
&a523_r_pinctrl_data,
SUNXI_PINCTRL_NEW_REG_LAYOUT);
SUNXI_PINCTRL_NCAT2_REG_LAYOUT);
}
static const struct of_device_id a523_r_pinctrl_match[] = {

2
drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
View File

@ -34,7 +34,7 @@ static int a523_pinctrl_probe(struct platform_device *pdev)
return sunxi_pinctrl_dt_table_init(pdev, a523_nr_bank_pins,
a523_irq_bank_muxes,
&a523_pinctrl_data,
SUNXI_PINCTRL_NEW_REG_LAYOUT |
SUNXI_PINCTRL_NCAT2_REG_LAYOUT |
SUNXI_PINCTRL_ELEVEN_BANKS);
}

4
drivers/pinctrl/sunxi/pinctrl-sunxi.c
View File

@ -1107,7 +1107,7 @@ static int sunxi_pinctrl_irq_request_resources(struct irq_data *d)
muxval = (readl(pctl->membase + reg) & mask) >> shift;
/* Change muxing to GPIO INPUT mode if at reset value */
if (pctl->flags & SUNXI_PINCTRL_NEW_REG_LAYOUT)
if (pctl->flags & SUNXI_PINCTRL_NCAT2_REG_LAYOUT)
disabled_mux = SUN4I_FUNC_DISABLED_NEW;
else
disabled_mux = SUN4I_FUNC_DISABLED_OLD;
@ -1589,7 +1589,7 @@ int sunxi_pinctrl_init_with_flags(struct platform_device *pdev,
pctl->dev = &pdev->dev;
pctl->desc = desc;
pctl->flags = flags;
if (flags & SUNXI_PINCTRL_NEW_REG_LAYOUT) {
if (flags & SUNXI_PINCTRL_NCAT2_REG_LAYOUT) {
pctl->bank_mem_size = D1_BANK_MEM_SIZE;
pctl->pull_regs_offset = D1_PULL_REGS_OFFSET;
pctl->dlevel_field_width = D1_DLEVEL_FIELD_WIDTH;

2
drivers/pinctrl/sunxi/pinctrl-sunxi.h
View File

@ -90,7 +90,7 @@
#define SUN4I_FUNC_DISABLED_NEW 15
#define SUNXI_PINCTRL_VARIANT_MASK GENMASK(7, 0)
#define SUNXI_PINCTRL_NEW_REG_LAYOUT BIT(8)
#define SUNXI_PINCTRL_NCAT2_REG_LAYOUT BIT(8)
#define SUNXI_PINCTRL_PORTF_SWITCH BIT(9)
#define SUNXI_PINCTRL_ELEVEN_BANKS BIT(10)