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drm/amdkfd: add a new flag to manage where VRAM allocations go
On big and small APUs we send KFD VRAM allocations to GTT since the carve out is either non-existent or relatively small. However, if someone sets the carve out size to be relatively large, we may end up using GTT rather than VRAM. No change of logic with this patch, but it allows the driver to determine which logic to use based on the carve out size in the future. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cc0e91a755
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@ -1193,6 +1193,11 @@ struct amdgpu_device {
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struct mutex enforce_isolation_mutex;
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struct amdgpu_init_level *init_lvl;
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/* This flag is used to determine how VRAM allocations are handled for APUs
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* in KFD: VRAM or GTT.
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*/
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bool apu_prefer_gtt;
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};
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static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,
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@ -459,7 +459,7 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
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else
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mem_info->local_mem_size_private =
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KFD_XCP_MEMORY_SIZE(adev, xcp->id);
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} else if (adev->flags & AMD_IS_APU) {
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} else if (adev->apu_prefer_gtt) {
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mem_info->local_mem_size_public = (ttm_tt_pages_limit() << PAGE_SHIFT);
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mem_info->local_mem_size_private = 0;
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} else {
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@ -818,7 +818,7 @@ u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device *adev, int xcp_id)
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}
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do_div(tmp, adev->xcp_mgr->num_xcp_per_mem_partition);
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return ALIGN_DOWN(tmp, PAGE_SIZE);
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} else if (adev->flags & AMD_IS_APU) {
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} else if (adev->apu_prefer_gtt) {
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return (ttm_tt_pages_limit() << PAGE_SHIFT);
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} else {
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return adev->gmc.real_vram_size;
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@ -197,7 +197,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
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return -EINVAL;
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vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id);
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if (adev->flags & AMD_IS_APU) {
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if (adev->apu_prefer_gtt) {
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system_mem_needed = size;
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ttm_mem_needed = size;
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}
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@ -234,7 +234,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
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if (adev && xcp_id >= 0) {
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adev->kfd.vram_used[xcp_id] += vram_needed;
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adev->kfd.vram_used_aligned[xcp_id] +=
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(adev->flags & AMD_IS_APU) ?
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adev->apu_prefer_gtt ?
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vram_needed :
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ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN);
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}
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@ -262,7 +262,7 @@ void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
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if (adev) {
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adev->kfd.vram_used[xcp_id] -= size;
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if (adev->flags & AMD_IS_APU) {
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if (adev->apu_prefer_gtt) {
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adev->kfd.vram_used_aligned[xcp_id] -= size;
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kfd_mem_limit.system_mem_used -= size;
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kfd_mem_limit.ttm_mem_used -= size;
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@ -890,7 +890,7 @@ static int kfd_mem_attach(struct amdgpu_device *adev, struct kgd_mem *mem,
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* if peer device has large BAR. In contrast, access over xGMI is
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* allowed for both small and large BAR configurations of peer device
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*/
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if ((adev != bo_adev && !(adev->flags & AMD_IS_APU)) &&
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if ((adev != bo_adev && !adev->apu_prefer_gtt) &&
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((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) ||
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(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) ||
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(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP))) {
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@ -1667,7 +1667,7 @@ size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev,
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- reserved_for_pt
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- reserved_for_ras;
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if (adev->flags & AMD_IS_APU) {
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if (adev->apu_prefer_gtt) {
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system_mem_available = no_system_mem_limit ?
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kfd_mem_limit.max_system_mem_limit :
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kfd_mem_limit.max_system_mem_limit -
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@ -1715,7 +1715,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
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if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
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domain = alloc_domain = AMDGPU_GEM_DOMAIN_VRAM;
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if (adev->flags & AMD_IS_APU) {
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if (adev->apu_prefer_gtt) {
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domain = AMDGPU_GEM_DOMAIN_GTT;
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alloc_domain = AMDGPU_GEM_DOMAIN_GTT;
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alloc_flags = 0;
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@ -1966,7 +1966,7 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
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if (size) {
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if (!is_imported &&
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(mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM ||
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((adev->flags & AMD_IS_APU) &&
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(adev->apu_prefer_gtt &&
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mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT)))
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*size = bo_size;
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else
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@ -2393,7 +2393,7 @@ static int import_obj_create(struct amdgpu_device *adev,
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(*mem)->bo = bo;
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(*mem)->va = va;
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(*mem)->domain = (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) &&
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!(adev->flags & AMD_IS_APU) ?
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!adev->apu_prefer_gtt ?
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AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT;
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(*mem)->mapped_to_gpu_memory = 0;
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@ -1987,6 +1987,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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DRM_INFO("amdgpu: %uM of GTT memory ready.\n",
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(unsigned int)(gtt_size / (1024 * 1024)));
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if (adev->flags & AMD_IS_APU)
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adev->apu_prefer_gtt = true;
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/* Initialize doorbell pool on PCI BAR */
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r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_DOORBELL, adev->doorbell.size / PAGE_SIZE);
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if (r) {
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@ -1027,7 +1027,7 @@ int kgd2kfd_init_zone_device(struct amdgpu_device *adev)
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if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(9, 0, 1))
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return -EINVAL;
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if (adev->flags & AMD_IS_APU)
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if (adev->apu_prefer_gtt)
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return 0;
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pgmap = &kfddev->pgmap;
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@ -2692,7 +2692,7 @@ svm_range_best_restore_location(struct svm_range *prange,
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return -1;
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}
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if (node->adev->flags & AMD_IS_APU)
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if (node->adev->apu_prefer_gtt)
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return 0;
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if (prange->preferred_loc == gpuid ||
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@ -3441,7 +3441,7 @@ svm_range_best_prefetch_location(struct svm_range *prange)
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goto out;
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}
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if (bo_node->adev->flags & AMD_IS_APU) {
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if (bo_node->adev->apu_prefer_gtt) {
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best_loc = 0;
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goto out;
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}
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@ -202,7 +202,7 @@ void svm_range_list_lock_and_flush_work(struct svm_range_list *svms, struct mm_s
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* is initialized to not 0 when page migration register device memory.
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*/
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#define KFD_IS_SVM_API_SUPPORTED(adev) ((adev)->kfd.pgmap.type != 0 ||\
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((adev)->flags & AMD_IS_APU))
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((adev)->apu_prefer_gtt))
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void svm_range_bo_unref_async(struct svm_range_bo *svm_bo);
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