Merge branch 'for-joerg/arm-smmu/bindings' into for-joerg/arm-smmu/updates

Updates to the Arm SMMU device-tree bindings.

* for-joerg/arm-smmu/bindings:
  dt-bindings: arm-smmu: Fix binding for SDX55 and SDX65
  dt-bindings: arm-smmu: Document smmu-500 binding for SM6125
  dt-bindings: arm-smmu: document the smmu on Qualcomm SA8775P
  dt-bindings: arm-smmu: disallow clocks when not used
  dt-bindings: iommu: qcom: Add Qualcomm MSM8953 compatible
  dt-bindings: arm-smmu: Add sm8150-smmu-500 to the list of Adreno smmus
  dt-bindings: arm-smmu: Allow 3 power domains on SM6375 MMU500
This commit is contained in:
Will Deacon 2023-01-24 11:45:41 +00:00
commit 8a24401701
2 changed files with 58 additions and 9 deletions

View File

@ -36,13 +36,17 @@ properties:
- enum:
- qcom,qcm2290-smmu-500
- qcom,qdu1000-smmu-500
- qcom,sa8775p-smmu-500
- qcom,sc7180-smmu-500
- qcom,sc7280-smmu-500
- qcom,sc8180x-smmu-500
- qcom,sc8280xp-smmu-500
- qcom,sdm670-smmu-500
- qcom,sdm845-smmu-500
- qcom,sdx55-smmu-500
- qcom,sdx65-smmu-500
- qcom,sm6115-smmu-500
- qcom,sm6125-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
- qcom,sm8150-smmu-500
@ -52,14 +56,6 @@ properties:
- const: qcom,smmu-500
- const: arm,mmu-500
- description: Qcom SoCs implementing "arm,mmu-500" (non-qcom implementation)
deprecated: true
items:
- enum:
- qcom,sdx55-smmu-500
- qcom,sdx65-smmu-500
- const: arm,mmu-500
- description: Qcom SoCs implementing "arm,mmu-500" (legacy binding)
deprecated: true
items:
@ -84,6 +80,7 @@ properties:
items:
- enum:
- qcom,sc7280-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- const: qcom,adreno-smmu
- const: arm,mmu-500
@ -201,7 +198,8 @@ properties:
maxItems: 7
power-domains:
maxItems: 1
minItems: 1
maxItems: 3
nvidia,memory-controller:
description: |
@ -366,6 +364,56 @@ allOf:
- description: interface clock required to access smmu's registers
through the TCU's programming interface.
# Disallow clocks for all other platforms with specific compatibles
- if:
properties:
compatible:
contains:
enum:
- cavium,smmu-v2
- marvell,ap806-smmu-500
- nvidia,smmu-500
- qcom,qcm2290-smmu-500
- qcom,qdu1000-smmu-500
- qcom,sa8775p-smmu-500
- qcom,sc7180-smmu-500
- qcom,sc8180x-smmu-500
- qcom,sc8280xp-smmu-500
- qcom,sdm670-smmu-500
- qcom,sdm845-smmu-500
- qcom,sdx55-smmu-500
- qcom,sdx65-smmu-500
- qcom,sm6115-smmu-500
- qcom,sm6125-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
- qcom,sm8350-smmu-500
- qcom,sm8450-smmu-500
then:
properties:
clock-names: false
clocks: false
- if:
properties:
compatible:
contains:
const: qcom,sm6375-smmu-500
then:
properties:
power-domains:
items:
- description: SNoC MMU TBU RT GDSC
- description: SNoC MMU TBU NRT GDSC
- description: SNoC TURING MMU TBU0 GDSC
required:
- power-domains
else:
properties:
power-domains:
maxItems: 1
examples:
- |+
/* SMMU with stream matching or stream indexing */

View File

@ -10,6 +10,7 @@ to non-secure vs secure interrupt line.
- compatible : Should be one of:
"qcom,msm8916-iommu"
"qcom,msm8953-iommu"
Followed by "qcom,msm-iommu-v1".