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Merge branch 'net-dsa-mt7530-fix-swallowed-mdio-read-errors'
Daniel Golle says: ==================== net: dsa: mt7530: fix swallowed MDIO read errors While working on a register access cleanup for the mt7530 driver, the Sashiko AI reviewers flagged long-standing error handling gaps in the driver's read paths [1]. The MDIO regmap backend truncates negative bus->read() errnos into u16 register halves and returns success, handing garbage data to callers and to read-modify-write cycles which then write it back to the switch. The ATC/VTCR command polls and the MT7531 indirect PHY polls consume reads through a helper which returns 0 when the underlying read fails. A failed bus transaction thus clears the polled busy bit and is mistaken for command completion, defeats the subsequent ATC_INVALID/VTCR_INVALID checks the same way, and lets the indirect PHY access functions return garbage PHY register data. Fix the backend to propagate bus->read() errors, and convert the command and PHY access polls to regmap_read_poll_timeout(), which terminates polling on read errors and propagates them. The cleanup series depending on these fixes will be submitted to net-next separately after the next net/net-next merger. [1] https://lore.kernel.org/netdev/cover.1784481922.git.daniel@makrotopia.org/ ==================== Link: https://patch.msgid.link/cover.1785213071.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
8a158ac1ce
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@ -55,8 +55,15 @@ mt7530_regmap_read(void *context, unsigned int reg, unsigned int *val)
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if (ret < 0)
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return ret;
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lo = bus->read(bus, priv->mdiodev->addr, r);
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hi = bus->read(bus, priv->mdiodev->addr, 0x10);
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ret = bus->read(bus, priv->mdiodev->addr, r);
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if (ret < 0)
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return ret;
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lo = ret;
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ret = bus->read(bus, priv->mdiodev->addr, 0x10);
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if (ret < 0)
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return ret;
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hi = ret;
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*val = (hi << 16) | (lo & 0xffff);
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@ -191,12 +191,6 @@ mt7530_write(struct mt7530_priv *priv, u32 reg, u32 val)
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mt7530_mutex_unlock(priv);
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}
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static u32
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_mt7530_unlocked_read(struct mt7530_dummy_poll *p)
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{
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return mt7530_mii_read(p->priv, p->reg);
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}
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static u32
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_mt7530_read(struct mt7530_dummy_poll *p)
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{
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@ -248,15 +242,20 @@ mt7530_fdb_cmd(struct mt7530_priv *priv, enum mt7530_fdb_cmd cmd, u32 *rsp)
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{
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u32 val;
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int ret;
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struct mt7530_dummy_poll p;
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/* Set the command operating upon the MAC address entries */
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val = ATC_BUSY | ATC_MAT(0) | cmd;
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mt7530_write(priv, MT7530_ATC, val);
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_ATC);
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ret = readx_poll_timeout(_mt7530_read, &p, val,
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!(val & ATC_BUSY), 20, 20000);
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mt7530_mutex_lock(priv);
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ret = regmap_read_poll_timeout(priv->regmap, MT7530_ATC, val,
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!(val & ATC_BUSY), 20, 20000);
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if (!ret)
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ret = regmap_read(priv->regmap, MT7530_ATC, &val);
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mt7530_mutex_unlock(priv);
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if (ret < 0) {
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dev_err(priv->dev, "reset timeout\n");
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return ret;
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@ -265,7 +264,6 @@ mt7530_fdb_cmd(struct mt7530_priv *priv, enum mt7530_fdb_cmd cmd, u32 *rsp)
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/* Additional sanity for read command if the specified
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* entry is invalid
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*/
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val = mt7530_read(priv, MT7530_ATC);
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if ((cmd == MT7530_FDB_READ) && (val & ATC_INVALID))
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return -EINVAL;
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@ -549,16 +547,13 @@ static int
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mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,
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int regnum)
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{
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struct mt7530_dummy_poll p;
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u32 reg, val;
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int ret;
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC);
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mt7530_mutex_lock(priv);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -568,8 +563,8 @@ mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,
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MT7531_MDIO_DEV_ADDR(devad) | regnum;
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mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -579,8 +574,8 @@ mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,
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MT7531_MDIO_DEV_ADDR(devad);
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mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -597,16 +592,13 @@ static int
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mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
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int regnum, u16 data)
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{
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struct mt7530_dummy_poll p;
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u32 val, reg;
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int ret;
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC);
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mt7530_mutex_lock(priv);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -616,8 +608,8 @@ mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
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MT7531_MDIO_DEV_ADDR(devad) | regnum;
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mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -627,8 +619,8 @@ mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
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MT7531_MDIO_DEV_ADDR(devad) | data;
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mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -643,16 +635,13 @@ mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
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static int
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mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum)
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{
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struct mt7530_dummy_poll p;
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int ret;
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u32 val;
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC);
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mt7530_mutex_lock(priv);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -663,8 +652,8 @@ mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum)
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mt7530_mii_write(priv, MT7531_PHY_IAC, val | MT7531_PHY_ACS_ST);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, val,
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!(val & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -681,16 +670,13 @@ static int
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mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum,
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u16 data)
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{
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struct mt7530_dummy_poll p;
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int ret;
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u32 reg;
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC);
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mt7530_mutex_lock(priv);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg,
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!(reg & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, reg,
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!(reg & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -701,8 +687,8 @@ mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum,
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mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);
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ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg,
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!(reg & MT7531_PHY_ACS_ST), 20, 100000);
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ret = regmap_read_poll_timeout(priv->regmap, MT7531_PHY_IAC, reg,
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!(reg & MT7531_PHY_ACS_ST), 20, 100000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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goto out;
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@ -1626,22 +1612,26 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int port,
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static int
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mt7530_vlan_cmd(struct mt7530_priv *priv, enum mt7530_vlan_cmd cmd, u16 vid)
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{
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struct mt7530_dummy_poll p;
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u32 val;
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int ret;
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val = VTCR_BUSY | VTCR_FUNC(cmd) | vid;
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mt7530_write(priv, MT7530_VTCR, val);
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_VTCR);
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ret = readx_poll_timeout(_mt7530_read, &p, val,
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!(val & VTCR_BUSY), 20, 20000);
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mt7530_mutex_lock(priv);
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ret = regmap_read_poll_timeout(priv->regmap, MT7530_VTCR, val,
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!(val & VTCR_BUSY), 20, 20000);
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if (!ret)
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ret = regmap_read(priv->regmap, MT7530_VTCR, &val);
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mt7530_mutex_unlock(priv);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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return ret;
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}
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val = mt7530_read(priv, MT7530_VTCR);
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if (val & VTCR_INVALID) {
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dev_err(priv->dev, "read VTCR invalid\n");
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return -EINVAL;
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