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arm64: dts: cix: Add CPU idle states for Sky1

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Add PSCI-based CPU idle state definitions for the Sky1 SoC,
enabling core and cluster level power management through
ARM PSCI firmware.

Three idle states are defined:

- CPU_SLEEP_0: Core idle state for A520 cores
  (psci-suspend-param 0x0010000), entry-latency 34us,
  exit-latency 100us

- CPU_SLEEP_1: Core idle state for A720 cores
  (psci-suspend-param 0x10000), entry-latency 31us,
  exit-latency 79us

- CLUSTER_SLEEP_0: Cluster idle state shared by all cores
  (psci-suspend-param 0x1010000), entry-latency 41us,
  exit-latency 104us

A520 cores (cpu0-3) reference CPU_SLEEP_0 and CLUSTER_SLEEP_0,
while A720 cores (cpu4-11) reference CPU_SLEEP_1 and
CLUSTER_SLEEP_0.

Signed-off-by: Devin Li <Devin.Li@cixtech.com>
Link: https://lore.kernel.org/r/20260507065956.3900087-1-Devin.Li@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
This commit is contained in:
Devin Li 2026-05-07 14:59:56 +08:00 committed by Peter Chen
parent aa771fbe69
commit 89d0ad7f3a
1 changed files with 41 additions and 0 deletions
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41
arch/arm64/boot/dts/cix/sky1.dtsi
View File

@ -25,6 +25,7 @@ cpu0: cpu@0 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu1: cpu@100 {
@ -35,6 +36,7 @@ cpu1: cpu@100 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu2: cpu@200 {
@ -45,6 +47,7 @@ cpu2: cpu@200 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu3: cpu@300 {
@ -55,6 +58,7 @@ cpu3: cpu@300 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
power-domain-names = "perf";
capacity-dmips-mhz = <403>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
cpu4: cpu@400 {
@ -65,6 +69,7 @@ cpu4: cpu@400 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu5: cpu@500 {
@ -75,6 +80,7 @@ cpu5: cpu@500 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu6: cpu@600 {
@ -85,6 +91,7 @@ cpu6: cpu@600 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu7: cpu@700 {
@ -95,6 +102,7 @@ cpu7: cpu@700 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu8: cpu@800 {
@ -105,6 +113,7 @@ cpu8: cpu@800 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu9: cpu@900 {
@ -115,6 +124,7 @@ cpu9: cpu@900 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu10: cpu@a00 {
@ -125,6 +135,7 @@ cpu10: cpu@a00 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu11: cpu@b00 {
@ -135,6 +146,7 @@ cpu11: cpu@b00 {
power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
power-domain-names = "perf";
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
};
cpu-map {
@ -177,6 +189,35 @@ core11 {
};
};
};
idle-states {
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <34>;
exit-latency-us = <100>;
min-residency-us = <3000>;
};
CPU_SLEEP_1: cpu-sleep-1 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <31>;
exit-latency-us = <79>;
min-residency-us = <3000>;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
entry-latency-us = <41>;
exit-latency-us = <104>;
min-residency-us = <4000>;
};
};
};
firmware {