clk: qcom: qcm2290: Add RETAIN_FF_ENABLE flag for DISPCC and GPUCC GDSCs

Add RETAIN_FF_ENABLE flag for DISPCC and GPUCC GDSCs on QCM2290 to retain
the register context across GDSC power collapse.

Fixes: cc517ea333 ("clk: qcom: Add display clock controller driver for QCM2290")
Fixes: 8cab033628 ("clk: qcom: Add QCM2290 GPU clock controller driver")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-6-62703e05ef0f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Imran Shaik 2026-07-18 18:26:13 +05:30 committed by Bjorn Andersson
parent 6b0044bc75
commit 899dfd9022
2 changed files with 3 additions and 3 deletions

View File

@ -456,7 +456,7 @@ static struct gdsc mdss_gdsc = {
.name = "mdss_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = HW_CTRL | POLL_CFG_GDSCR,
.flags = HW_CTRL | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
};
static struct gdsc *disp_cc_qcm2290_gdscs[] = {

View File

@ -301,7 +301,7 @@ static struct gdsc gpu_cx_gdsc = {
.name = "gpu_cx_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = VOTABLE,
.flags = RETAIN_FF_ENABLE | VOTABLE,
};
static struct gdsc gpu_gx_gdsc = {
@ -314,7 +314,7 @@ static struct gdsc gpu_gx_gdsc = {
},
.parent = &gpu_cx_gdsc.pd,
.pwrsts = PWRSTS_OFF_ON,
.flags = POLL_CFG_GDSCR | CLAMP_IO | AON_RESET | SW_RESET,
.flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR | CLAMP_IO | AON_RESET | SW_RESET,
};
static struct clk_regmap *gpu_cc_qcm2290_clocks[] = {