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ARM: dts: BCM5301X: add root pcie bridges

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They are always required and instead of duplicating a definition in each
dts file, place it in dtsi with labels and work based on that.

Also changed each bridge@ to pcie@ to get extra dtc static analysis.

Fixed bridge numbers as a result.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://lore.kernel.org/r/20260302000736.592422-1-rosenp@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
This commit is contained in:
Rosen Penev 2026-03-01 16:07:36 -08:00 committed by Florian Fainelli
parent f699e0aa7a
commit 893faf6743
4 changed files with 76 additions and 99 deletions
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30
arch/arm/boot/dts/broadcom/bcm-ns.dtsi
View File

@ -196,6 +196,16 @@ pcie0: pcie@12000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
pcie_bridge0: pcie@0 {
device_type = "pci";
reg = <0x0000 0 0 0 0>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
}; };
pcie1: pcie@13000 { pcie1: pcie@13000 {
@ -210,6 +220,16 @@ pcie1: pcie@13000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
pcie_bridge1: pcie@0 {
device_type = "pci";
reg = <0x0000 0 0 0 0>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
}; };
pcie2: pcie@14000 { pcie2: pcie@14000 {
@ -224,6 +244,16 @@ pcie2: pcie@14000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
pcie_bridge2: pcie@0 {
device_type = "pci";
reg = <0x0000 0 0 0 0>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
}; };
usb2: usb2@21000 { usb2: usb2@21000 {

41
arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts
View File

@ -126,46 +126,32 @@ button-brightness {
}; };
}; };
&pcie0 { &pcie_bridge0 {
#address-cells = <3>; wifi@0,0 {
#size-cells = <2>;
bridge@0,0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
wifi@0,1,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5735000 5835000>; ieee80211-freq-limit = <5735000 5835000>;
brcm,ccode-map = "JP-JP-78", "US-Q2-86"; brcm,ccode-map = "JP-JP-78", "US-Q2-86";
}; };
}; };
};
&pcie1 { &pcie_bridge1 {
#address-cells = <3>; pcie@0,0 {
#size-cells = <2>; device_type = "pci";
bridge@1,0,0 {
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
bus-range = <0x01 0xff>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges;
bridge@1,1,0 { pcie@1,0 {
reg = <0x0000 0 0 0 0>; device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
bridge@1,0 {
reg = <0x800 0 0 0 0>; reg = <0x800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges;
wifi@0,0 { wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
@ -174,13 +160,15 @@ wifi@0,0 {
}; };
}; };
bridge@1,2,2 { pcie@2,0 {
device_type = "pci";
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges;
wifi@1,4,0 { wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5170000 5730000>; ieee80211-freq-limit = <5170000 5730000>;
@ -189,7 +177,6 @@ wifi@1,4,0 {
}; };
}; };
}; };
};
&usb2 { &usb2 {
vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;

24
arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts
View File

@ -65,41 +65,21 @@ &gmac0 {
}; };
&pcie0 { &pcie_bridge0 {
#address-cells = <3>;
#size-cells = <2>;
bridge@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
wifi@0,0 { wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825"; brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
}; };
}; };
};
&pcie1 {
#address-cells = <3>;
#size-cells = <2>;
bridge@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
&pcie_bridge1 {
wifi@0,0 { wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825"; brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
}; };
}; };
};
&spi_nor { &spi_nor {
status = "okay"; status = "okay";

24
arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts
View File

@ -81,41 +81,21 @@ &gmac0 {
nvmem-cell-names = "mac-address"; nvmem-cell-names = "mac-address";
}; };
&pcie0 { &pcie_bridge0 {
#address-cells = <3>;
#size-cells = <2>;
bridge@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
wifi@0,0 { wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930"; brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
}; };
}; };
};
&pcie1 {
#address-cells = <3>;
#size-cells = <2>;
bridge@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
&pcie_bridge1 {
wifi@0,0 { wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>; reg = <0x0000 0 0 0 0>;
brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930"; brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
}; };
}; };
};
&usb3 { &usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;