arm64: dts: ti: k3-j721s2: Fix clock IDs for MCSPI instances

The clock IDs for multiple MCSPI instances across wakeup domain
in J721s2 are incorrect when compared with documentation [1]. Fix the
clock IDs to their appropriate values.

[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html

Fixes: 04d7cb647b ("arm64: dts: ti: k3-j721s2: Add MCSPI nodes")

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Link: https://lore.kernel.org/r/20241023104532.3438851-4-a-dutta@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Anurag Dutta 2024-10-23 16:15:31 +05:30 committed by Vignesh Raghavendra
parent ab09a68f3b
commit 891874f015
2 changed files with 11 additions and 11 deletions

View File

@ -1709,7 +1709,7 @@ main_spi0: spi@2100000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 339 1>;
clocks = <&k3_clks 339 2>;
status = "disabled";
};
@ -1720,7 +1720,7 @@ main_spi1: spi@2110000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 340 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 340 1>;
clocks = <&k3_clks 340 2>;
status = "disabled";
};
@ -1731,7 +1731,7 @@ main_spi2: spi@2120000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 341 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 341 1>;
clocks = <&k3_clks 341 2>;
status = "disabled";
};
@ -1742,7 +1742,7 @@ main_spi3: spi@2130000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 342 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 342 1>;
clocks = <&k3_clks 342 2>;
status = "disabled";
};
@ -1753,7 +1753,7 @@ main_spi4: spi@2140000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 343 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 343 1>;
clocks = <&k3_clks 343 2>;
status = "disabled";
};
@ -1764,7 +1764,7 @@ main_spi5: spi@2150000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 344 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 344 1>;
clocks = <&k3_clks 344 2>;
status = "disabled";
};
@ -1775,7 +1775,7 @@ main_spi6: spi@2160000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 345 1>;
clocks = <&k3_clks 345 2>;
status = "disabled";
};
@ -1786,7 +1786,7 @@ main_spi7: spi@2170000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 346 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 346 1>;
clocks = <&k3_clks 346 2>;
status = "disabled";
};

View File

@ -433,7 +433,7 @@ mcu_spi0: spi@40300000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 347 0>;
clocks = <&k3_clks 347 2>;
status = "disabled";
};
@ -444,7 +444,7 @@ mcu_spi1: spi@40310000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 348 0>;
clocks = <&k3_clks 348 2>;
status = "disabled";
};
@ -455,7 +455,7 @@ mcu_spi2: spi@40320000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 349 0>;
clocks = <&k3_clks 349 2>;
status = "disabled";
};