arm64: dts: renesas: r9a09g057: Add Mali-G31 GPU node

Add Mali-G31 GPU node to SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250218115922.407816-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2025-02-18 11:59:21 +00:00 committed by Geert Uytterhoeven
parent 5f7ebb8111
commit 88e83915d8

View File

@ -105,6 +105,35 @@ L3_CA55: cache-controller-0 {
};
};
gpu_opp_table: opp-table-1 {
compatible = "operating-points-v2";
opp-630000000 {
opp-hz = /bits/ 64 <630000000>;
opp-microvolt = <800000>;
};
opp-315000000 {
opp-hz = /bits/ 64 <315000000>;
opp-microvolt = <800000>;
};
opp-157500000 {
opp-hz = /bits/ 64 <157500000>;
opp-microvolt = <800000>;
};
opp-78750000 {
opp-hz = /bits/ 64 <78750000>;
opp-microvolt = <800000>;
};
opp-19687500 {
opp-hz = /bits/ 64 <19687500>;
opp-microvolt = <800000>;
};
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
@ -581,6 +610,28 @@ i2c8: i2c@11c01000 {
status = "disabled";
};
gpu: gpu@14850000 {
compatible = "renesas,r9a09g057-mali",
"arm,mali-bifrost";
reg = <0x0 0x14850000 0x0 0x10000>;
interrupts = <GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu", "event";
clocks = <&cpg CPG_MOD 0xf0>,
<&cpg CPG_MOD 0xf1>,
<&cpg CPG_MOD 0xf2>;
clock-names = "gpu", "bus", "bus_ace";
power-domains = <&cpg>;
resets = <&cpg 0xdd>,
<&cpg 0xde>,
<&cpg 0xdf>;
reset-names = "rst", "axi_rst", "ace_rst";
operating-points-v2 = <&gpu_opp_table>;
status = "disabled";
};
gic: interrupt-controller@14900000 {
compatible = "arm,gic-v3";
reg = <0x0 0x14900000 0 0x20000>,