diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 113e43bc1f6d..7d1654f60094 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1333,6 +1333,11 @@ struct intel_crtc_state { bool compression_enabled_on_link; bool compression_enable; int num_streams; + struct intel_dsc_slice_config { + int pipes_per_line; + int streams_per_pipe; + int slices_per_stream; + } slice_config; /* Compressed Bpp in U6.4 format (first 4 bits for fractional part) */ u16 compressed_bpp_x16; u8 slice_count; diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 5493082f30a7..f8e4b2aa6c17 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -35,6 +35,11 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) return true; } +int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config) +{ + return config->pipes_per_line * config->streams_per_pipe * config->slices_per_stream; +} + static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder) { struct intel_display *display = to_intel_display(crtc); diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h index 99f64ac54b27..e61116d5297c 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h @@ -13,9 +13,11 @@ struct drm_printer; enum transcoder; struct intel_crtc; struct intel_crtc_state; +struct intel_dsc_slice_config; struct intel_encoder; bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); +int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config); void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); void intel_dsc_enable(const struct intel_crtc_state *crtc_state); void intel_dsc_disable(const struct intel_crtc_state *crtc_state);