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Merge patch series "pinctrl: intel: Convert the rest to use INTEL_GPP()"
Andy Shevchenko <andriy.shevchenko@linux.intel.com> says: A few drivers use the more customised versions of INTEL_GPP(). Convert them to use INTEL_GPP() directly. Link: https://patch.msgid.link/20251111191214.1378051-1-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This commit is contained in:
Andy Shevchenko
commit
885b92bad8
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@ -21,13 +21,6 @@
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#define CDF_GPI_IS 0x200
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#define CDF_GPI_IE 0x230
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#define CDF_GPP(r, s, e) \
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{ \
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.reg_num = (r), \
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.base = (s), \
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.size = ((e) - (s) + 1), \
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}
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#define CDF_COMMUNITY(b, s, e, g) \
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INTEL_COMMUNITY_GPPS(b, s, e, g, CDF)
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@ -288,24 +281,24 @@ static const struct pinctrl_pin_desc cdf_pins[] = {
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};
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static const struct intel_padgroup cdf_community0_gpps[] = {
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CDF_GPP(0, 0, 23), /* WEST2 */
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CDF_GPP(1, 24, 47), /* WEST3 */
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CDF_GPP(2, 48, 70), /* WEST01 */
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CDF_GPP(3, 71, 90), /* WEST5 */
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CDF_GPP(4, 91, 96), /* WESTC */
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CDF_GPP(5, 97, 101), /* WESTC_DFX */
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CDF_GPP(6, 102, 111), /* WESTA */
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CDF_GPP(7, 112, 123), /* WESTB */
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CDF_GPP(8, 124, 143), /* WESTD */
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CDF_GPP(9, 144, 144), /* WESTD_PECI */
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CDF_GPP(10, 145, 167), /* WESTF */
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INTEL_GPP(0, 0, 23, 0), /* WEST2 */
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INTEL_GPP(1, 24, 47, 24), /* WEST3 */
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INTEL_GPP(2, 48, 70, 48), /* WEST01 */
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INTEL_GPP(3, 71, 90, 71), /* WEST5 */
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INTEL_GPP(4, 91, 96, 91), /* WESTC */
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INTEL_GPP(5, 97, 101, 97), /* WESTC_DFX */
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INTEL_GPP(6, 102, 111, 102), /* WESTA */
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INTEL_GPP(7, 112, 123, 112), /* WESTB */
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INTEL_GPP(8, 124, 143, 124), /* WESTD */
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INTEL_GPP(9, 144, 144, 144), /* WESTD_PECI */
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INTEL_GPP(10, 145, 167, 145), /* WESTF */
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};
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static const struct intel_padgroup cdf_community1_gpps[] = {
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CDF_GPP(0, 168, 191), /* EAST2 */
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CDF_GPP(1, 192, 202), /* EAST3 */
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CDF_GPP(2, 203, 225), /* EAST0 */
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CDF_GPP(3, 226, 236), /* EMMC */
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INTEL_GPP(0, 168, 191, 168), /* EAST2 */
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INTEL_GPP(1, 192, 202, 192), /* EAST3 */
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INTEL_GPP(2, 203, 225, 203), /* EAST0 */
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INTEL_GPP(3, 226, 236, 226), /* EMMC */
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};
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static const struct intel_community cdf_communities[] = {
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@ -92,12 +92,6 @@ struct intel_community_context {
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#define PINMODE(m, i) ((m) | ((i) * PINMODE_INVERT_OE))
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#define CHV_GPP(start, end) \
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{ \
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.base = (start), \
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.size = (end) - (start) + 1, \
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}
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#define CHV_COMMUNITY(g, i, a) \
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{ \
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.gpps = (g), \
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@ -258,13 +252,13 @@ static const struct intel_function southwest_functions[] = {
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};
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static const struct intel_padgroup southwest_gpps[] = {
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CHV_GPP(0, 7),
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CHV_GPP(15, 22),
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CHV_GPP(30, 37),
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CHV_GPP(45, 52),
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CHV_GPP(60, 67),
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CHV_GPP(75, 82),
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CHV_GPP(90, 97),
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INTEL_GPP(0, 0, 7, 0),
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INTEL_GPP(1, 15, 22, 15),
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INTEL_GPP(2, 30, 37, 30),
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INTEL_GPP(3, 45, 52, 45),
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INTEL_GPP(4, 60, 67, 60),
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INTEL_GPP(5, 75, 82, 75),
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INTEL_GPP(6, 90, 97, 90),
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};
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/*
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@ -354,11 +348,11 @@ static const struct pinctrl_pin_desc north_pins[] = {
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};
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static const struct intel_padgroup north_gpps[] = {
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CHV_GPP(0, 8),
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CHV_GPP(15, 27),
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CHV_GPP(30, 41),
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CHV_GPP(45, 56),
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CHV_GPP(60, 72),
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INTEL_GPP(0, 0, 8, 0),
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INTEL_GPP(1, 15, 27, 15),
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INTEL_GPP(2, 30, 41, 30),
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INTEL_GPP(3, 45, 56, 45),
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INTEL_GPP(4, 60, 72, 60),
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};
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/*
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@ -406,8 +400,8 @@ static const struct pinctrl_pin_desc east_pins[] = {
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};
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static const struct intel_padgroup east_gpps[] = {
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CHV_GPP(0, 11),
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CHV_GPP(15, 26),
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INTEL_GPP(0, 0, 11, 0),
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INTEL_GPP(1, 15, 26, 15),
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};
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static const struct intel_community east_communities[] = {
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@ -526,12 +520,12 @@ static const struct intel_function southeast_functions[] = {
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};
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static const struct intel_padgroup southeast_gpps[] = {
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CHV_GPP(0, 7),
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CHV_GPP(15, 26),
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CHV_GPP(30, 35),
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CHV_GPP(45, 52),
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CHV_GPP(60, 69),
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CHV_GPP(75, 85),
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INTEL_GPP(0, 0, 7, 0),
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INTEL_GPP(1, 15, 26, 15),
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INTEL_GPP(2, 30, 35, 30),
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INTEL_GPP(3, 45, 52, 45),
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INTEL_GPP(4, 60, 69, 60),
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INTEL_GPP(5, 75, 85, 75),
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};
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static const struct intel_community southeast_communities[] = {
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@ -21,13 +21,6 @@
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#define DNV_GPI_IS 0x100
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#define DNV_GPI_IE 0x120
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#define DNV_GPP(n, s, e) \
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{ \
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.reg_num = (n), \
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.base = (s), \
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.size = ((e) - (s) + 1), \
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}
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#define DNV_COMMUNITY(b, s, e, g) \
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INTEL_COMMUNITY_GPPS(b, s, e, g, DNV)
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@ -222,16 +215,16 @@ static const struct intel_function dnv_functions[] = {
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};
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static const struct intel_padgroup dnv_north_gpps[] = {
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DNV_GPP(0, 0, 31), /* North ALL_0 */
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DNV_GPP(1, 32, 40), /* North ALL_1 */
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INTEL_GPP(0, 0, 31, 0), /* North ALL_0 */
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INTEL_GPP(1, 32, 40, 32), /* North ALL_1 */
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};
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static const struct intel_padgroup dnv_south_gpps[] = {
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DNV_GPP(0, 41, 58), /* South DFX */
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DNV_GPP(1, 59, 90), /* South GPP0_0 */
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DNV_GPP(2, 91, 111), /* South GPP0_1 */
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DNV_GPP(3, 112, 143), /* South GPP1_0 */
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DNV_GPP(4, 144, 153), /* South GPP1_1 */
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INTEL_GPP(0, 41, 58, 41), /* South DFX */
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INTEL_GPP(1, 59, 90, 59), /* South GPP0_0 */
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INTEL_GPP(2, 91, 111, 91), /* South GPP0_1 */
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INTEL_GPP(3, 112, 143, 112), /* South GPP1_0 */
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INTEL_GPP(4, 144, 153, 144), /* South GPP1_1 */
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};
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static const struct intel_community dnv_communities[] = {
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@ -21,13 +21,6 @@
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#define EHL_GPI_IS 0x100
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#define EHL_GPI_IE 0x120
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#define EHL_GPP(r, s, e) \
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{ \
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.reg_num = (r), \
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.base = (s), \
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.size = ((e) - (s) + 1), \
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}
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#define EHL_COMMUNITY(b, s, e, g) \
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INTEL_COMMUNITY_GPPS(b, s, e, g, EHL)
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@ -106,9 +99,9 @@ static const struct pinctrl_pin_desc ehl_community0_pins[] = {
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};
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static const struct intel_padgroup ehl_community0_gpps[] = {
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EHL_GPP(0, 0, 25), /* GPP_B */
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EHL_GPP(1, 26, 41), /* GPP_T */
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EHL_GPP(2, 42, 66), /* GPP_G */
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INTEL_GPP(0, 0, 25, 0), /* GPP_B */
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INTEL_GPP(1, 26, 41, 26), /* GPP_T */
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INTEL_GPP(2, 42, 66, 42), /* GPP_G */
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};
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static const struct intel_community ehl_community0[] = {
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@ -245,11 +238,11 @@ static const struct pinctrl_pin_desc ehl_community1_pins[] = {
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};
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static const struct intel_padgroup ehl_community1_gpps[] = {
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EHL_GPP(0, 0, 15), /* GPP_V */
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EHL_GPP(1, 16, 39), /* GPP_H */
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EHL_GPP(2, 40, 60), /* GPP_D */
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EHL_GPP(3, 61, 84), /* GPP_U */
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EHL_GPP(4, 85, 112), /* vGPIO */
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INTEL_GPP(0, 0, 15, 0), /* GPP_V */
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INTEL_GPP(1, 16, 39, 16), /* GPP_H */
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INTEL_GPP(2, 40, 60, 40), /* GPP_D */
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INTEL_GPP(3, 61, 84, 61), /* GPP_U */
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INTEL_GPP(4, 85, 112, 85), /* vGPIO */
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};
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static const struct intel_community ehl_community1[] = {
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@ -286,7 +279,7 @@ static const struct pinctrl_pin_desc ehl_community2_pins[] = {
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};
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static const struct intel_padgroup ehl_community2_gpps[] = {
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EHL_GPP(0, 0, 16), /* DSW */
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INTEL_GPP(0, 0, 16, 0), /* DSW */
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};
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static const struct intel_community ehl_community2[] = {
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@ -356,10 +349,10 @@ static const struct pinctrl_pin_desc ehl_community3_pins[] = {
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};
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static const struct intel_padgroup ehl_community3_gpps[] = {
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EHL_GPP(0, 0, 16), /* CPU */
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EHL_GPP(1, 17, 18), /* GPP_S */
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EHL_GPP(2, 19, 42), /* GPP_A */
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EHL_GPP(3, 43, 46), /* vGPIO_3 */
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INTEL_GPP(0, 0, 16, 0), /* CPU */
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INTEL_GPP(1, 17, 18, 17), /* GPP_S */
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INTEL_GPP(2, 19, 42, 19), /* GPP_A */
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INTEL_GPP(3, 43, 46, 43), /* vGPIO_3 */
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};
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static const struct intel_community ehl_community3[] = {
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@ -462,10 +455,10 @@ static const struct pinctrl_pin_desc ehl_community4_pins[] = {
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};
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static const struct intel_padgroup ehl_community4_gpps[] = {
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EHL_GPP(0, 0, 23), /* GPP_C */
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EHL_GPP(1, 24, 48), /* GPP_F */
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EHL_GPP(2, 49, 54), /* HVCMOS */
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EHL_GPP(3, 55, 79), /* GPP_E */
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INTEL_GPP(0, 0, 23, 0), /* GPP_C */
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INTEL_GPP(1, 24, 48, 24), /* GPP_F */
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INTEL_GPP(2, 49, 54, 49), /* HVCMOS */
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INTEL_GPP(3, 55, 79, 55), /* GPP_E */
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};
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static const struct intel_community ehl_community4[] = {
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@ -493,7 +486,7 @@ static const struct pinctrl_pin_desc ehl_community5_pins[] = {
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};
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static const struct intel_padgroup ehl_community5_gpps[] = {
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EHL_GPP(0, 0, 7), /* GPP_R */
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INTEL_GPP(0, 0, 7, 0), /* GPP_R */
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};
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static const struct intel_community ehl_community5[] = {
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@ -21,13 +21,6 @@
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#define EBG_GPI_IS 0x200
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#define EBG_GPI_IE 0x210
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#define EBG_GPP(r, s, e) \
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{ \
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.reg_num = (r), \
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.base = (s), \
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.size = ((e) - (s) + 1), \
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}
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#define EBG_COMMUNITY(b, s, e, g) \
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INTEL_COMMUNITY_GPPS(b, s, e, g, EBG)
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@ -311,31 +304,31 @@ static const struct pinctrl_pin_desc ebg_pins[] = {
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};
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static const struct intel_padgroup ebg_community0_gpps[] = {
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EBG_GPP(0, 0, 20), /* GPP_A */
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EBG_GPP(1, 21, 44), /* GPP_B */
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EBG_GPP(2, 45, 65), /* SPI */
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INTEL_GPP(0, 0, 20, 0), /* GPP_A */
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INTEL_GPP(1, 21, 44, 21), /* GPP_B */
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INTEL_GPP(2, 45, 65, 45), /* SPI */
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};
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static const struct intel_padgroup ebg_community1_gpps[] = {
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EBG_GPP(0, 66, 87), /* GPP_C */
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EBG_GPP(1, 88, 111), /* GPP_D */
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INTEL_GPP(0, 66, 87, 66), /* GPP_C */
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INTEL_GPP(1, 88, 111, 88), /* GPP_D */
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};
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static const struct intel_padgroup ebg_community3_gpps[] = {
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EBG_GPP(0, 112, 135), /* GPP_E */
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EBG_GPP(1, 136, 145), /* JTAG */
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INTEL_GPP(0, 112, 135, 112), /* GPP_E */
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INTEL_GPP(1, 136, 145, 136), /* JTAG */
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};
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static const struct intel_padgroup ebg_community4_gpps[] = {
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EBG_GPP(0, 146, 165), /* GPP_H */
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EBG_GPP(1, 166, 183), /* GPP_J */
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INTEL_GPP(0, 146, 165, 146), /* GPP_H */
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INTEL_GPP(1, 166, 183, 166), /* GPP_J */
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};
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static const struct intel_padgroup ebg_community5_gpps[] = {
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EBG_GPP(0, 184, 207), /* GPP_I */
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EBG_GPP(1, 208, 225), /* GPP_L */
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EBG_GPP(2, 226, 243), /* GPP_M */
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EBG_GPP(3, 244, 261), /* GPP_N */
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INTEL_GPP(0, 184, 207, 184), /* GPP_I */
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INTEL_GPP(1, 208, 225, 208), /* GPP_L */
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INTEL_GPP(2, 226, 243, 226), /* GPP_M */
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INTEL_GPP(3, 244, 261, 244), /* GPP_N */
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};
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static const struct intel_community ebg_communities[] = {
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