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serial: 8250_dw: Rework dw8250_handle_irq() locking and IIR handling
dw8250_handle_irq() takes port's lock multiple times with no good reason to release it in between and calls serial8250_handle_irq() that also takes port's lock. Take port's lock only once in dw8250_handle_irq() and use serial8250_handle_irq_locked() to avoid releasing port's lock in between. As IIR_NO_INT check in serial8250_handle_irq() was outside of port's lock, it has to be done already in dw8250_handle_irq(). DW UART can, in addition to IIR_NO_INT, report BUSY_DETECT (0x7) which collided with the IIR_NO_INT (0x1) check in serial8250_handle_irq() (because & is used instead of ==) meaning that no other work is done by serial8250_handle_irq() during an BUSY_DETECT interrupt. This allows reorganizing code in dw8250_handle_irq() to do both IIR_NO_INT and BUSY_DETECT handling right at the start simplifying the logic. Tested-by: Bandal, Shankar <shankar.bandal@intel.com> Tested-by: Murthy, Shanth <shanth.murthy@intel.com> Cc: stable <stable@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://patch.msgid.link/20260203171049.4353-5-ilpo.jarvinen@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -9,6 +9,9 @@
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* LCR is written whilst busy. If it is, then a busy detect interrupt is
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* raised, the LCR needs to be rewritten and the uart status register read.
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/cleanup.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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@ -40,6 +43,8 @@
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#define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */
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/* DesignWare specific register fields */
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#define DW_UART_IIR_IID GENMASK(3, 0)
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#define DW_UART_MCR_SIRE BIT(6)
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/* Renesas specific register fields */
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@ -312,7 +317,19 @@ static int dw8250_handle_irq(struct uart_port *p)
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bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT;
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unsigned int quirks = d->pdata->quirks;
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unsigned int status;
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unsigned long flags;
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switch (FIELD_GET(DW_UART_IIR_IID, iir)) {
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case UART_IIR_NO_INT:
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return 0;
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case UART_IIR_BUSY:
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/* Clear the USR */
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serial_port_in(p, d->pdata->usr_reg);
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return 1;
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}
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guard(uart_port_lock_irqsave)(p);
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/*
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* There are ways to get Designware-based UARTs into a state where
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@ -325,20 +342,15 @@ static int dw8250_handle_irq(struct uart_port *p)
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* so we limit the workaround only to non-DMA mode.
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*/
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if (!up->dma && rx_timeout) {
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uart_port_lock_irqsave(p, &flags);
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status = serial_lsr_in(up);
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if (!(status & (UART_LSR_DR | UART_LSR_BI)))
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serial_port_in(p, UART_RX);
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uart_port_unlock_irqrestore(p, flags);
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}
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/* Manually stop the Rx DMA transfer when acting as flow controller */
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if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) {
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uart_port_lock_irqsave(p, &flags);
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status = serial_lsr_in(up);
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uart_port_unlock_irqrestore(p, flags);
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if (status & (UART_LSR_DR | UART_LSR_BI)) {
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dw8250_writel_ext(p, RZN1_UART_RDMACR, 0);
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@ -346,17 +358,9 @@ static int dw8250_handle_irq(struct uart_port *p)
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}
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}
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if (serial8250_handle_irq(p, iir))
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return 1;
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serial8250_handle_irq_locked(p, iir);
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if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
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/* Clear the USR */
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serial_port_in(p, d->pdata->usr_reg);
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return 1;
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}
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return 0;
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return 1;
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}
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static void dw8250_clk_work_cb(struct work_struct *work)
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@ -867,6 +871,7 @@ static struct platform_driver dw8250_platform_driver = {
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module_platform_driver(dw8250_platform_driver);
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MODULE_IMPORT_NS("SERIAL_8250");
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MODULE_AUTHOR("Jamie Iles");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver");
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