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serial: 8250_dw: Rework dw8250_handle_irq() locking and IIR handling

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dw8250_handle_irq() takes port's lock multiple times with no good
reason to release it in between and calls serial8250_handle_irq()
that also takes port's lock.

Take port's lock only once in dw8250_handle_irq() and use
serial8250_handle_irq_locked() to avoid releasing port's lock in
between.

As IIR_NO_INT check in serial8250_handle_irq() was outside of port's
lock, it has to be done already in dw8250_handle_irq().

DW UART can, in addition to IIR_NO_INT, report BUSY_DETECT (0x7) which
collided with the IIR_NO_INT (0x1) check in serial8250_handle_irq()
(because & is used instead of ==) meaning that no other work is done by
serial8250_handle_irq() during an BUSY_DETECT interrupt.

This allows reorganizing code in dw8250_handle_irq() to do both
IIR_NO_INT and BUSY_DETECT handling right at the start simplifying
the logic.

Tested-by: Bandal, Shankar <shankar.bandal@intel.com>
Tested-by: Murthy, Shanth <shanth.murthy@intel.com>
Cc: stable <stable@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://patch.msgid.link/20260203171049.4353-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ilpo Järvinen 2026-02-03 19:10:46 +02:00 committed by Greg Kroah-Hartman
parent 8324a54f60
commit 883c5a2bc9
1 changed files with 21 additions and 16 deletions
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35
drivers/tty/serial/8250/8250_dw.c
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@ -9,6 +9,9 @@
* LCR is written whilst busy. If it is, then a busy detect interrupt is * LCR is written whilst busy. If it is, then a busy detect interrupt is
* raised, the LCR needs to be rewritten and the uart status register read. * raised, the LCR needs to be rewritten and the uart status register read.
*/ */
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/cleanup.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/device.h> #include <linux/device.h>
@ -40,6 +43,8 @@
#define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ #define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */
/* DesignWare specific register fields */ /* DesignWare specific register fields */
#define DW_UART_IIR_IID GENMASK(3, 0)
#define DW_UART_MCR_SIRE BIT(6) #define DW_UART_MCR_SIRE BIT(6)
/* Renesas specific register fields */ /* Renesas specific register fields */
@ -312,7 +317,19 @@ static int dw8250_handle_irq(struct uart_port *p)
bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT; bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT;
unsigned int quirks = d->pdata->quirks; unsigned int quirks = d->pdata->quirks;
unsigned int status; unsigned int status;
unsigned long flags;
switch (FIELD_GET(DW_UART_IIR_IID, iir)) {
case UART_IIR_NO_INT:
return 0;
case UART_IIR_BUSY:
/* Clear the USR */
serial_port_in(p, d->pdata->usr_reg);
return 1;
}
guard(uart_port_lock_irqsave)(p);
/* /*
* There are ways to get Designware-based UARTs into a state where * There are ways to get Designware-based UARTs into a state where
@ -325,20 +342,15 @@ static int dw8250_handle_irq(struct uart_port *p)
* so we limit the workaround only to non-DMA mode. * so we limit the workaround only to non-DMA mode.
*/ */
if (!up->dma && rx_timeout) { if (!up->dma && rx_timeout) {
uart_port_lock_irqsave(p, &flags);
status = serial_lsr_in(up); status = serial_lsr_in(up);
if (!(status & (UART_LSR_DR | UART_LSR_BI))) if (!(status & (UART_LSR_DR | UART_LSR_BI)))
serial_port_in(p, UART_RX); serial_port_in(p, UART_RX);
uart_port_unlock_irqrestore(p, flags);
} }
/* Manually stop the Rx DMA transfer when acting as flow controller */ /* Manually stop the Rx DMA transfer when acting as flow controller */
if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) { if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) {
uart_port_lock_irqsave(p, &flags);
status = serial_lsr_in(up); status = serial_lsr_in(up);
uart_port_unlock_irqrestore(p, flags);
if (status & (UART_LSR_DR | UART_LSR_BI)) { if (status & (UART_LSR_DR | UART_LSR_BI)) {
dw8250_writel_ext(p, RZN1_UART_RDMACR, 0); dw8250_writel_ext(p, RZN1_UART_RDMACR, 0);
@ -346,17 +358,9 @@ static int dw8250_handle_irq(struct uart_port *p)
} }
} }
if (serial8250_handle_irq(p, iir)) serial8250_handle_irq_locked(p, iir);
return 1;
if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
/* Clear the USR */
serial_port_in(p, d->pdata->usr_reg);
return 1; return 1;
}
return 0;
} }
static void dw8250_clk_work_cb(struct work_struct *work) static void dw8250_clk_work_cb(struct work_struct *work)
@ -867,6 +871,7 @@ static struct platform_driver dw8250_platform_driver = {
module_platform_driver(dw8250_platform_driver); module_platform_driver(dw8250_platform_driver);
MODULE_IMPORT_NS("SERIAL_8250");
MODULE_AUTHOR("Jamie Iles"); MODULE_AUTHOR("Jamie Iles");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver"); MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver");