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drm/msm/hdmi: use new helper for ACR tables
Use new drm_hdmi_acr_get_n_cts() helper instead of hand-coding the tables. Instead of storing the rate 'index', store the audio sample rate in hdmi->audio.rate, removing the need for even more defines. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/647507/ Link: https://lore.kernel.org/r/20250408-drm-hdmi-acr-v2-3-dee7298ab1af@oss.qualcomm.com
This commit is contained in:
Dmitry Baryshkov
parent
1735917ac4
commit
88321e3529
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@ -4,6 +4,7 @@
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include <drm/display/drm_hdmi_helper.h>
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#include <drm/display/drm_hdmi_state_helper.h>
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#include <linux/hdmi.h>
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@ -12,71 +13,9 @@
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#include "hdmi.h"
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/* Supported HDMI Audio sample rates */
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#define MSM_HDMI_SAMPLE_RATE_32KHZ 0
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#define MSM_HDMI_SAMPLE_RATE_44_1KHZ 1
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#define MSM_HDMI_SAMPLE_RATE_48KHZ 2
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#define MSM_HDMI_SAMPLE_RATE_88_2KHZ 3
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#define MSM_HDMI_SAMPLE_RATE_96KHZ 4
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#define MSM_HDMI_SAMPLE_RATE_176_4KHZ 5
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#define MSM_HDMI_SAMPLE_RATE_192KHZ 6
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#define MSM_HDMI_SAMPLE_RATE_MAX 7
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struct hdmi_msm_audio_acr {
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uint32_t n; /* N parameter for clock regeneration */
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uint32_t cts; /* CTS parameter for clock regeneration */
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};
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struct hdmi_msm_audio_arcs {
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unsigned long int pixclock;
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struct hdmi_msm_audio_acr lut[MSM_HDMI_SAMPLE_RATE_MAX];
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};
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#define HDMI_MSM_AUDIO_ARCS(pclk, ...) { (1000 * (pclk)), __VA_ARGS__ }
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/* Audio constants lookup table for hdmi_msm_audio_acr_setup */
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/* Valid Pixel-Clock rates: 25.2MHz, 27MHz, 27.03MHz, 74.25MHz, 148.5MHz */
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static const struct hdmi_msm_audio_arcs acr_lut[] = {
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/* 25.200MHz */
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HDMI_MSM_AUDIO_ARCS(25200, {
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{4096, 25200}, {6272, 28000}, {6144, 25200}, {12544, 28000},
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{12288, 25200}, {25088, 28000}, {24576, 25200} }),
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/* 27.000MHz */
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HDMI_MSM_AUDIO_ARCS(27000, {
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{4096, 27000}, {6272, 30000}, {6144, 27000}, {12544, 30000},
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{12288, 27000}, {25088, 30000}, {24576, 27000} }),
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/* 27.027MHz */
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HDMI_MSM_AUDIO_ARCS(27030, {
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{4096, 27027}, {6272, 30030}, {6144, 27027}, {12544, 30030},
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{12288, 27027}, {25088, 30030}, {24576, 27027} }),
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/* 74.250MHz */
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HDMI_MSM_AUDIO_ARCS(74250, {
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{4096, 74250}, {6272, 82500}, {6144, 74250}, {12544, 82500},
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{12288, 74250}, {25088, 82500}, {24576, 74250} }),
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/* 148.500MHz */
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HDMI_MSM_AUDIO_ARCS(148500, {
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{4096, 148500}, {6272, 165000}, {6144, 148500}, {12544, 165000},
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{12288, 148500}, {25088, 165000}, {24576, 148500} }),
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};
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static const struct hdmi_msm_audio_arcs *get_arcs(unsigned long int pixclock)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(acr_lut); i++) {
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const struct hdmi_msm_audio_arcs *arcs = &acr_lut[i];
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if (arcs->pixclock == pixclock)
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return arcs;
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}
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return NULL;
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}
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int msm_hdmi_audio_update(struct hdmi *hdmi)
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{
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struct hdmi_audio *audio = &hdmi->audio;
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const struct hdmi_msm_audio_arcs *arcs = NULL;
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bool enabled = audio->enabled;
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uint32_t acr_pkt_ctrl, vbi_pkt_ctrl, aud_pkt_ctrl;
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uint32_t audio_config;
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@ -94,15 +33,6 @@ int msm_hdmi_audio_update(struct hdmi *hdmi)
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enabled = false;
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}
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if (enabled) {
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arcs = get_arcs(hdmi->pixclock);
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if (!arcs) {
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DBG("disabling audio: unsupported pixclock: %lu",
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hdmi->pixclock);
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enabled = false;
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}
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}
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/* Read first before writing */
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acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL);
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vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL);
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@ -116,15 +46,12 @@ int msm_hdmi_audio_update(struct hdmi *hdmi)
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uint32_t n, cts, multiplier;
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enum hdmi_acr_cts select;
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n = arcs->lut[audio->rate].n;
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cts = arcs->lut[audio->rate].cts;
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drm_hdmi_acr_get_n_cts(hdmi->pixclock, audio->rate, &n, &cts);
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if ((MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate) ||
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(MSM_HDMI_SAMPLE_RATE_176_4KHZ == audio->rate)) {
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if (audio->rate == 192000 || audio->rate == 176400) {
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multiplier = 4;
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n >>= 2; /* divide N by 4 and use multiplier */
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} else if ((MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) ||
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(MSM_HDMI_SAMPLE_RATE_88_2KHZ == audio->rate)) {
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} else if (audio->rate == 96000 || audio->rate == 88200) {
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multiplier = 2;
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n >>= 1; /* divide N by 2 and use multiplier */
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} else {
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@ -137,13 +64,11 @@ int msm_hdmi_audio_update(struct hdmi *hdmi)
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acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_AUDIO_PRIORITY;
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acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_N_MULTIPLIER(multiplier);
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if ((MSM_HDMI_SAMPLE_RATE_48KHZ == audio->rate) ||
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(MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) ||
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(MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate))
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if (audio->rate == 48000 || audio->rate == 96000 ||
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audio->rate == 192000)
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select = ACR_48;
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else if ((MSM_HDMI_SAMPLE_RATE_44_1KHZ == audio->rate) ||
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(MSM_HDMI_SAMPLE_RATE_88_2KHZ == audio->rate) ||
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(MSM_HDMI_SAMPLE_RATE_176_4KHZ == audio->rate))
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else if (audio->rate == 44100 || audio->rate == 88200 ||
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audio->rate == 176400)
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select = ACR_44;
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else /* default to 32k */
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select = ACR_32;
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@ -204,7 +129,6 @@ int msm_hdmi_bridge_audio_prepare(struct drm_connector *connector,
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{
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struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
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struct hdmi *hdmi = hdmi_bridge->hdmi;
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unsigned int rate;
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int ret;
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drm_dbg_driver(bridge->dev, "%u Hz, %d bit, %d channels\n",
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@ -214,25 +138,12 @@ int msm_hdmi_bridge_audio_prepare(struct drm_connector *connector,
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switch (params->sample_rate) {
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case 32000:
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rate = MSM_HDMI_SAMPLE_RATE_32KHZ;
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break;
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case 44100:
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rate = MSM_HDMI_SAMPLE_RATE_44_1KHZ;
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break;
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case 48000:
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rate = MSM_HDMI_SAMPLE_RATE_48KHZ;
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break;
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case 88200:
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rate = MSM_HDMI_SAMPLE_RATE_88_2KHZ;
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break;
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case 96000:
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rate = MSM_HDMI_SAMPLE_RATE_96KHZ;
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break;
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case 176400:
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rate = MSM_HDMI_SAMPLE_RATE_176_4KHZ;
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break;
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case 192000:
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rate = MSM_HDMI_SAMPLE_RATE_192KHZ;
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break;
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default:
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drm_err(bridge->dev, "rate[%d] not supported!\n",
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@ -245,7 +156,7 @@ int msm_hdmi_bridge_audio_prepare(struct drm_connector *connector,
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if (ret)
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return ret;
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hdmi->audio.rate = rate;
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hdmi->audio.rate = params->sample_rate;
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hdmi->audio.channels = params->cea.channels;
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hdmi->audio.enabled = true;
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