drm/amd/pm: Use cached data for min/max clocks

If dpm tables are already populated on SMU v13.0.6 SOCs, use the cached
data. Otherwise, fetch values from firmware.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2025-07-11 21:48:33 +05:30 committed by Alex Deucher
parent 9ffab039bc
commit 8825dabaf6

View File

@ -881,51 +881,51 @@ static int smu_v13_0_6_get_dpm_ultimate_freq(struct smu_context *smu,
enum smu_clk_type clk_type,
uint32_t *min, uint32_t *max)
{
struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
struct smu_table_context *smu_table = &smu->smu_table;
struct PPTable_t *pptable =
(struct PPTable_t *)smu_table->driver_pptable;
uint32_t clock_limit = 0, param;
struct smu_13_0_dpm_table *dpm_table;
uint32_t min_clk, max_clk, param;
int ret = 0, clk_id = 0;
if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) {
/* Use dpm tables, if data is already fetched */
if (pptable->Init) {
switch (clk_type) {
case SMU_MCLK:
case SMU_UCLK:
if (pptable->Init)
clock_limit = pptable->UclkFrequencyTable[0];
dpm_table = &dpm_context->dpm_tables.uclk_table;
break;
case SMU_GFXCLK:
case SMU_SCLK:
if (pptable->Init)
clock_limit = pptable->MinGfxclkFrequency;
dpm_table = &dpm_context->dpm_tables.gfx_table;
break;
case SMU_SOCCLK:
if (pptable->Init)
clock_limit = pptable->SocclkFrequencyTable[0];
dpm_table = &dpm_context->dpm_tables.soc_table;
break;
case SMU_FCLK:
if (pptable->Init)
clock_limit = pptable->FclkFrequencyTable[0];
dpm_table = &dpm_context->dpm_tables.fclk_table;
break;
case SMU_VCLK:
if (pptable->Init)
clock_limit = pptable->VclkFrequencyTable[0];
dpm_table = &dpm_context->dpm_tables.vclk_table;
break;
case SMU_DCLK:
if (pptable->Init)
clock_limit = pptable->DclkFrequencyTable[0];
dpm_table = &dpm_context->dpm_tables.dclk_table;
break;
default:
break;
return -EINVAL;
}
min_clk = dpm_table->min;
max_clk = dpm_table->max;
if (min)
*min = clock_limit;
*min = min_clk;
if (max)
*max = clock_limit;
*max = max_clk;
return 0;
if (min_clk && max_clk)
return 0;
}
if (!(clk_type == SMU_GFXCLK || clk_type == SMU_SCLK)) {