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dt-bindings: arm: coresight-tmc: Add "memory-region" property

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memory-region 0: Reserved trace buffer memory

  TMC ETR: When available, use this reserved memory region for
  trace data capture. Same region is used for trace data
  retention after a panic or watchdog reset.

  TMC ETF: When available, use this reserved memory region for
  trace data retention synced from internal SRAM after a panic or
  watchdog reset.

memory-region 1: Reserved meta data memory

  TMC ETR, ETF: When available, use this memory for register
  snapshot retention synced from hardware registers after a panic
  or watchdog reset.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linu Cherian <lcherian@marvell.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250212114918.548431-2-lcherian@marvell.com
This commit is contained in:
Linu Cherian 2025-02-12 17:19:11 +05:30 committed by Suzuki K Poulose
parent 0e14e062f5
commit 87b8166a73
1 changed files with 26 additions and 0 deletions
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26
Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
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@ -101,6 +101,29 @@ properties:
and ETF configurations.
$ref: /schemas/graph.yaml#/properties/port
memory-region:
items:
- description: Reserved trace buffer memory for ETR and ETF sinks.
For ETR, this reserved memory region is used for trace data capture.
Same region is used for trace data retention as well after a panic
or watchdog reset.
This reserved memory region is used as trace buffer or used for trace
data retention only if specifically selected by the user in sysfs
interface.
The default memory usage models for ETR in sysfs/perf modes are
otherwise unaltered.
For ETF, this reserved memory region is used by default for
retention of trace data synced from internal SRAM after a panic
or watchdog reset.
- description: Reserved meta data memory. Used for ETR and ETF sinks
for storing metadata.
memory-region-names:
items:
- const: tracedata
- const: metadata
required:
- compatible
- reg
@ -115,6 +138,9 @@ examples:
etr@20070000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x20070000 0x1000>;
memory-region = <&etr_trace_mem_reserved>,
<&etr_mdata_mem_reserved>;
memory-region-names = "tracedata", "metadata";
clocks = <&oscclk6a>;
clock-names = "apb_pclk";