Late devicetree changes for omaps for v5.11 merge window

Here are few more late changes that would be nice to get into v5.11:
 
 - More updates to use cpsw switchdev driver
 
 - Enable gta04 PMIC power management
 
 - Updates for dra7 for ECC support, 1.8GHz speed and keep the
   ldo0 regulator always on as specified in the data manual
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Merge tag 'omap-for-v5.11/dt-late-signed' into omap-for-v5.12-dt

Late devicetree changes for omaps for v5.11 merge window

Here are few more late changes that would be nice to get into v5.11:

- More updates to use cpsw switchdev driver

- Enable gta04 PMIC power management

- Updates for dra7 for ECC support, 1.8GHz speed and keep the
  ldo0 regulator always on as specified in the data manual
This commit is contained in:
Tony Lindgren 2021-01-18 10:03:24 +02:00
commit 87ab16b644
8 changed files with 113 additions and 23 deletions

View File

@ -684,28 +684,31 @@ vmmc_reg: regulator@12 {
};
};
&mac {
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
slaves = <1>;
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-id";
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
status = "disabled";
};
&tscadc {

View File

@ -596,19 +596,17 @@ vmmc_reg: regulator@12 {
};
};
&mac {
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
@ -619,16 +617,16 @@ ethphy1: ethernet-phy@1 {
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&mmc1 {

View File

@ -474,31 +474,29 @@ p10 {
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&mac {
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
dual_emac;
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */

View File

@ -765,6 +765,55 @@ cpsw_emac1: slave@300 {
phys = <&phy_gmii_sel 2 1>;
};
};
mac_sw: switch@0 {
compatible = "ti,am335x-cpsw-switch", "ti,cpsw-switch";
reg = <0x0 0x4000>;
ranges = <0 0 0x4000>;
clocks = <&cpsw_125mhz_gclk>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
syscon = <&scm_conf>;
status = "disabled";
interrupts = <40 41 42 43>;
interrupt-names = "rx_thresh", "rx", "tx", "misc";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
cpsw_port1: port@1 {
reg = <1>;
label = "port1";
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 1 1>;
};
cpsw_port2: port@2 {
reg = <2>;
label = "port2";
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 2 1>;
};
};
davinci_mdio_sw: mdio@1000 {
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
clocks = <&cpsw_125mhz_gclk>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
reg = <0x1000 0x100>;
};
cpts {
clocks = <&cpsw_cpts_rft_clk>;
clock-names = "cpts";
};
};
};
target-module@180000 { /* 0x4a180000, ap 5 10.0 */

View File

@ -39,3 +39,7 @@ &mmc2 {
&m_can0 {
status = "disabled";
};
&emif1 {
status = "okay";
};

View File

@ -112,6 +112,8 @@ lp8733_ldo0_reg: ldo0 {
regulator-name = "lp8733-ldo0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
lp8733_ldo1_reg: ldo1 {

View File

@ -9,6 +9,13 @@ / {
compatible = "ti,dra762", "ti,dra7";
ocp {
emif1: emif@4c000000 {
compatible = "ti,emif-dra7xx";
reg = <0x4c000000 0x200>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
target-module@42c01900 {
compatible = "ti,sysc-dra7-mcan", "ti,sysc";
ranges = <0x0 0x42c00000 0x2000>;
@ -133,3 +140,32 @@ &mmc3 {
/* dra76x is not affected by i887 */
max-frequency = <96000000>;
};
&cpu0_opp_table {
opp_plus@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1250000 950000 1250000>,
<1250000 950000 1250000>;
opp-supported-hw = <0xFF 0x08>;
};
};
&opp_supply_mpu {
ti,efuse-settings = <
/* uV offset */
1060000 0x0
1160000 0x4
1210000 0x8
1250000 0xC
>;
};
&abb_mpu {
ti,abb_info = <
/*uV ABB efuse rbb_m fbb_m vset_m*/
1060000 0 0x0 0 0x02000000 0x01F00000
1160000 0 0x4 0 0x02000000 0x01F00000
1210000 0 0x8 0 0x02000000 0x01F00000
1250000 0 0xC 0 0x02000000 0x01F00000
>;
};

View File

@ -489,8 +489,8 @@ codec {
};
twl_power: power {
compatible = "ti,twl4030-power";
ti,use_poweroff;
compatible = "ti,twl4030-power-idle";
ti,system-power-controller;
};
};
};