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Merge branch 'pci/endpoint'
- Convert the endpoint doorbell test to use a threaded IRQ to fix a 'sleeping while atomic' issue (Bhanu Seshu Kumar Valluri) - Add endpoint VNTB MSI doorbell support to reduce latency between host and endpoint (Frank Li) * pci/endpoint: PCI: endpoint: pci-epf-vntb: Add MSI doorbell support PCI: endpoint: Add pci_epf_assign_bar_space() API PCI: endpoint: Add pci_epf_get_required_bar_size() helper PCI: endpoint: Rename 'epf_bar::aligned_size' to 'epf_bar:mem_size' PCI: endpoint: pci-epf-test: Fix sleeping function being called from atomic context
This commit is contained in:
Bjorn Helgaas
commit
87a194e672
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@ -730,8 +730,9 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
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if (bar < BAR_0)
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goto err_doorbell_cleanup;
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ret = request_irq(epf->db_msg[0].virq, pci_epf_test_doorbell_handler, 0,
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"pci-ep-test-doorbell", epf_test);
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ret = request_threaded_irq(epf->db_msg[0].virq, NULL,
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pci_epf_test_doorbell_handler, IRQF_ONESHOT,
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"pci-ep-test-doorbell", epf_test);
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if (ret) {
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dev_err(&epf->dev,
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"Failed to request doorbell IRQ: %d\n",
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@ -36,11 +36,13 @@
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* PCIe Root Port PCI EP
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*/
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#include <linux/atomic.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/pci-ep-msi.h>
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#include <linux/pci-epc.h>
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#include <linux/pci-epf.h>
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#include <linux/ntb.h>
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@ -126,12 +128,13 @@ struct epf_ntb {
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u32 db_count;
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u32 spad_count;
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u64 mws_size[MAX_MW];
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u64 db;
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atomic64_t db;
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u32 vbus_number;
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u16 vntb_pid;
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u16 vntb_vid;
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bool linkup;
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bool msi_doorbell;
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u32 spad_size;
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enum pci_barno epf_ntb_bar[VNTB_BAR_NUM];
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@ -258,9 +261,9 @@ static void epf_ntb_cmd_handler(struct work_struct *work)
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ntb = container_of(work, struct epf_ntb, cmd_handler.work);
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for (i = 1; i < ntb->db_count; i++) {
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for (i = 1; i < ntb->db_count && !ntb->msi_doorbell; i++) {
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if (ntb->epf_db[i]) {
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ntb->db |= 1 << (i - 1);
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atomic64_or(1 << (i - 1), &ntb->db);
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ntb_db_event(&ntb->ntb, i);
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ntb->epf_db[i] = 0;
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}
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@ -319,7 +322,21 @@ static void epf_ntb_cmd_handler(struct work_struct *work)
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reset_handler:
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queue_delayed_work(kpcintb_workqueue, &ntb->cmd_handler,
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msecs_to_jiffies(5));
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ntb->msi_doorbell ? msecs_to_jiffies(500) : msecs_to_jiffies(5));
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}
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static irqreturn_t epf_ntb_doorbell_handler(int irq, void *data)
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{
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struct epf_ntb *ntb = data;
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int i;
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for (i = 1; i < ntb->db_count; i++)
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if (irq == ntb->epf->db_msg[i].virq) {
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atomic64_or(1 << (i - 1), &ntb->db);
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ntb_db_event(&ntb->ntb, i);
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}
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return IRQ_HANDLED;
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}
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/**
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@ -500,6 +517,94 @@ static int epf_ntb_configure_interrupt(struct epf_ntb *ntb)
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return 0;
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}
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static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
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struct pci_epf_bar *db_bar,
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const struct pci_epc_features *epc_features,
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enum pci_barno barno)
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{
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struct pci_epf *epf = ntb->epf;
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dma_addr_t low, high;
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struct msi_msg *msg;
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size_t sz;
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int ret;
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int i;
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ret = pci_epf_alloc_doorbell(epf, ntb->db_count);
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if (ret)
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return ret;
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for (i = 0; i < ntb->db_count; i++) {
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ret = request_irq(epf->db_msg[i].virq, epf_ntb_doorbell_handler,
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0, "pci_epf_vntb_db", ntb);
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if (ret) {
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dev_err(&epf->dev,
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"Failed to request doorbell IRQ: %d\n",
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epf->db_msg[i].virq);
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goto err_free_irq;
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}
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}
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msg = &epf->db_msg[0].msg;
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high = 0;
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low = (u64)msg->address_hi << 32 | msg->address_lo;
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for (i = 0; i < ntb->db_count; i++) {
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struct msi_msg *msg = &epf->db_msg[i].msg;
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dma_addr_t addr = (u64)msg->address_hi << 32 | msg->address_lo;
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low = min(low, addr);
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high = max(high, addr);
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}
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sz = high - low + sizeof(u32);
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ret = pci_epf_assign_bar_space(epf, sz, barno, epc_features, 0, low);
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if (ret) {
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dev_err(&epf->dev, "Failed to assign Doorbell BAR space\n");
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goto err_free_irq;
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}
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ret = pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no,
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ntb->epf->vfunc_no, db_bar);
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if (ret) {
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dev_err(&epf->dev, "Failed to set Doorbell BAR\n");
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goto err_free_irq;
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}
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for (i = 0; i < ntb->db_count; i++) {
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struct msi_msg *msg = &epf->db_msg[i].msg;
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dma_addr_t addr;
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size_t offset;
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ret = pci_epf_align_inbound_addr(epf, db_bar->barno,
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((u64)msg->address_hi << 32) | msg->address_lo,
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&addr, &offset);
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if (ret) {
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ntb->msi_doorbell = false;
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goto err_free_irq;
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}
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ntb->reg->db_data[i] = msg->data;
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ntb->reg->db_offset[i] = offset;
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}
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ntb->reg->db_entry_size = 0;
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ntb->msi_doorbell = true;
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return 0;
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err_free_irq:
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for (i--; i >= 0; i--)
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free_irq(epf->db_msg[i].virq, ntb);
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pci_epf_free_doorbell(ntb->epf);
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return ret;
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}
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/**
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* epf_ntb_db_bar_init() - Configure Doorbell window BARs
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* @ntb: NTB device that facilitates communication between HOST and VHOST
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@ -520,21 +625,25 @@ static int epf_ntb_db_bar_init(struct epf_ntb *ntb)
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ntb->epf->func_no,
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ntb->epf->vfunc_no);
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barno = ntb->epf_ntb_bar[BAR_DB];
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mw_addr = pci_epf_alloc_space(ntb->epf, size, barno, epc_features, 0);
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if (!mw_addr) {
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dev_err(dev, "Failed to allocate OB address\n");
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return -ENOMEM;
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}
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ntb->epf_db = mw_addr;
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epf_bar = &ntb->epf->bar[barno];
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ret = pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no, epf_bar);
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ret = epf_ntb_db_bar_init_msi_doorbell(ntb, epf_bar, epc_features, barno);
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if (ret) {
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dev_err(dev, "Doorbell BAR set failed\n");
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/* fall back to polling mode */
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mw_addr = pci_epf_alloc_space(ntb->epf, size, barno, epc_features, 0);
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if (!mw_addr) {
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dev_err(dev, "Failed to allocate OB address\n");
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return -ENOMEM;
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}
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ntb->epf_db = mw_addr;
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ret = pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no,
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ntb->epf->vfunc_no, epf_bar);
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if (ret) {
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dev_err(dev, "Doorbell BAR set failed\n");
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goto err_alloc_peer_mem;
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}
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}
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return ret;
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@ -554,6 +663,16 @@ static void epf_ntb_db_bar_clear(struct epf_ntb *ntb)
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{
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enum pci_barno barno;
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if (ntb->msi_doorbell) {
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int i;
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for (i = 0; i < ntb->db_count; i++)
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free_irq(ntb->epf->db_msg[i].virq, ntb);
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}
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if (ntb->epf->db_msg)
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pci_epf_free_doorbell(ntb->epf);
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barno = ntb->epf_ntb_bar[BAR_DB];
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pci_epf_free_space(ntb->epf, ntb->epf_db, barno, 0);
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pci_epc_clear_bar(ntb->epf->epc,
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@ -1268,7 +1387,7 @@ static u64 vntb_epf_db_read(struct ntb_dev *ndev)
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{
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struct epf_ntb *ntb = ntb_ndev(ndev);
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return ntb->db;
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return atomic64_read(&ntb->db);
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}
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static int vntb_epf_mw_get_align(struct ntb_dev *ndev, int pidx, int idx,
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@ -1308,7 +1427,7 @@ static int vntb_epf_db_clear(struct ntb_dev *ndev, u64 db_bits)
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{
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struct epf_ntb *ntb = ntb_ndev(ndev);
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ntb->db &= ~db_bits;
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atomic64_and(~db_bits, &ntb->db);
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return 0;
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}
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@ -208,6 +208,48 @@ void pci_epf_remove_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf)
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}
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EXPORT_SYMBOL_GPL(pci_epf_remove_vepf);
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static int pci_epf_get_required_bar_size(struct pci_epf *epf, size_t *bar_size,
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size_t *aligned_mem_size,
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enum pci_barno bar,
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const struct pci_epc_features *epc_features,
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enum pci_epc_interface_type type)
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{
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u64 bar_fixed_size = epc_features->bar[bar].fixed_size;
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size_t align = epc_features->align;
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size_t size = *bar_size;
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if (size < 128)
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size = 128;
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/* According to PCIe base spec, min size for a resizable BAR is 1 MB. */
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if (epc_features->bar[bar].type == BAR_RESIZABLE && size < SZ_1M)
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size = SZ_1M;
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if (epc_features->bar[bar].type == BAR_FIXED && bar_fixed_size) {
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if (size > bar_fixed_size) {
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dev_err(&epf->dev,
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"requested BAR size is larger than fixed size\n");
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return -ENOMEM;
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}
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size = bar_fixed_size;
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} else {
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/* BAR size must be power of two */
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size = roundup_pow_of_two(size);
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}
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*bar_size = size;
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/*
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* The EPC's BAR start address must meet alignment requirements. In most
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* cases, the alignment will match the BAR size. However, differences
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* can occur—for example, when the fixed BAR size (e.g., 128 bytes) is
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* smaller than the required alignment (e.g., 4 KB).
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*/
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*aligned_mem_size = align ? ALIGN(size, align) : size;
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return 0;
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}
|
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|
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/**
|
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* pci_epf_free_space() - free the allocated PCI EPF register space
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* @epf: the EPF device from whom to free the memory
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||||
|
|
@ -236,13 +278,13 @@ void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar,
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}
|
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|
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dev = epc->dev.parent;
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dma_free_coherent(dev, epf_bar[bar].aligned_size, addr,
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dma_free_coherent(dev, epf_bar[bar].mem_size, addr,
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epf_bar[bar].phys_addr);
|
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|
||||
epf_bar[bar].phys_addr = 0;
|
||||
epf_bar[bar].addr = NULL;
|
||||
epf_bar[bar].size = 0;
|
||||
epf_bar[bar].aligned_size = 0;
|
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epf_bar[bar].mem_size = 0;
|
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epf_bar[bar].barno = 0;
|
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epf_bar[bar].flags = 0;
|
||||
}
|
||||
|
|
@ -264,40 +306,16 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
|
|||
const struct pci_epc_features *epc_features,
|
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enum pci_epc_interface_type type)
|
||||
{
|
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u64 bar_fixed_size = epc_features->bar[bar].fixed_size;
|
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size_t aligned_size, align = epc_features->align;
|
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struct pci_epf_bar *epf_bar;
|
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dma_addr_t phys_addr;
|
||||
struct pci_epc *epc;
|
||||
struct device *dev;
|
||||
size_t mem_size;
|
||||
void *space;
|
||||
|
||||
if (size < 128)
|
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size = 128;
|
||||
|
||||
/* According to PCIe base spec, min size for a resizable BAR is 1 MB. */
|
||||
if (epc_features->bar[bar].type == BAR_RESIZABLE && size < SZ_1M)
|
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size = SZ_1M;
|
||||
|
||||
if (epc_features->bar[bar].type == BAR_FIXED && bar_fixed_size) {
|
||||
if (size > bar_fixed_size) {
|
||||
dev_err(&epf->dev,
|
||||
"requested BAR size is larger than fixed size\n");
|
||||
return NULL;
|
||||
}
|
||||
size = bar_fixed_size;
|
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} else {
|
||||
/* BAR size must be power of two */
|
||||
size = roundup_pow_of_two(size);
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate enough memory to accommodate the iATU alignment
|
||||
* requirement. In most cases, this will be the same as .size but
|
||||
* it might be different if, for example, the fixed size of a BAR
|
||||
* is smaller than align.
|
||||
*/
|
||||
aligned_size = align ? ALIGN(size, align) : size;
|
||||
if (pci_epf_get_required_bar_size(epf, &size, &mem_size, bar,
|
||||
epc_features, type))
|
||||
return NULL;
|
||||
|
||||
if (type == PRIMARY_INTERFACE) {
|
||||
epc = epf->epc;
|
||||
|
|
@ -308,7 +326,7 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
|
|||
}
|
||||
|
||||
dev = epc->dev.parent;
|
||||
space = dma_alloc_coherent(dev, aligned_size, &phys_addr, GFP_KERNEL);
|
||||
space = dma_alloc_coherent(dev, mem_size, &phys_addr, GFP_KERNEL);
|
||||
if (!space) {
|
||||
dev_err(dev, "failed to allocate mem space\n");
|
||||
return NULL;
|
||||
|
|
@ -317,7 +335,7 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
|
|||
epf_bar[bar].phys_addr = phys_addr;
|
||||
epf_bar[bar].addr = space;
|
||||
epf_bar[bar].size = size;
|
||||
epf_bar[bar].aligned_size = aligned_size;
|
||||
epf_bar[bar].mem_size = mem_size;
|
||||
epf_bar[bar].barno = bar;
|
||||
if (upper_32_bits(size) || epc_features->bar[bar].only_64bit)
|
||||
epf_bar[bar].flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
|
||||
|
|
@ -328,6 +346,83 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(pci_epf_alloc_space);
|
||||
|
||||
/**
|
||||
* pci_epf_assign_bar_space() - Assign PCI EPF BAR space
|
||||
* @epf: EPF device to assign the BAR memory
|
||||
* @size: Size of the memory that has to be assigned
|
||||
* @bar: BAR number for which the memory is assigned
|
||||
* @epc_features: Features provided by the EPC specific to this EPF
|
||||
* @type: Identifies if the assignment is for primary EPC or secondary EPC
|
||||
* @bar_addr: Address to be assigned for the @bar
|
||||
*
|
||||
* Invoke to assign memory for the PCI EPF BAR.
|
||||
* Flag PCI_BASE_ADDRESS_MEM_TYPE_64 will automatically get set if the BAR
|
||||
* can only be a 64-bit BAR, or if the requested size is larger than 2 GB.
|
||||
*/
|
||||
int pci_epf_assign_bar_space(struct pci_epf *epf, size_t size,
|
||||
enum pci_barno bar,
|
||||
const struct pci_epc_features *epc_features,
|
||||
enum pci_epc_interface_type type,
|
||||
dma_addr_t bar_addr)
|
||||
{
|
||||
size_t bar_size, aligned_mem_size;
|
||||
struct pci_epf_bar *epf_bar;
|
||||
dma_addr_t limit;
|
||||
int pos;
|
||||
|
||||
if (!size)
|
||||
return -EINVAL;
|
||||
|
||||
limit = bar_addr + size - 1;
|
||||
|
||||
/*
|
||||
* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||||
* bar_addr: U U U U U U 0 X X X X X X X X X
|
||||
* limit: U U U U U U 1 X X X X X X X X X
|
||||
*
|
||||
* bar_addr^limit 0 0 0 0 0 0 1 X X X X X X X X X
|
||||
*
|
||||
* U: unchanged address bits in range [bar_addr, limit]
|
||||
* X: bit 0 or 1
|
||||
*
|
||||
* (bar_addr^limit) & BIT_ULL(pos) will find the first set bit from MSB
|
||||
* (pos). And value of (2 ^ pos) should be able to cover the BAR range.
|
||||
*/
|
||||
for (pos = 8 * sizeof(dma_addr_t) - 1; pos > 0; pos--)
|
||||
if ((limit ^ bar_addr) & BIT_ULL(pos))
|
||||
break;
|
||||
|
||||
if (pos == 8 * sizeof(dma_addr_t) - 1)
|
||||
return -EINVAL;
|
||||
|
||||
bar_size = BIT_ULL(pos + 1);
|
||||
if (pci_epf_get_required_bar_size(epf, &bar_size, &aligned_mem_size,
|
||||
bar, epc_features, type))
|
||||
return -ENOMEM;
|
||||
|
||||
if (type == PRIMARY_INTERFACE)
|
||||
epf_bar = epf->bar;
|
||||
else
|
||||
epf_bar = epf->sec_epc_bar;
|
||||
|
||||
epf_bar[bar].phys_addr = ALIGN_DOWN(bar_addr, aligned_mem_size);
|
||||
|
||||
if (epf_bar[bar].phys_addr + bar_size < limit)
|
||||
return -ENOMEM;
|
||||
|
||||
epf_bar[bar].addr = NULL;
|
||||
epf_bar[bar].size = bar_size;
|
||||
epf_bar[bar].mem_size = aligned_mem_size;
|
||||
epf_bar[bar].barno = bar;
|
||||
if (upper_32_bits(size) || epc_features->bar[bar].only_64bit)
|
||||
epf_bar[bar].flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
|
||||
else
|
||||
epf_bar[bar].flags |= PCI_BASE_ADDRESS_MEM_TYPE_32;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pci_epf_assign_bar_space);
|
||||
|
||||
static void pci_epf_remove_cfs(struct pci_epf_driver *driver)
|
||||
{
|
||||
struct config_group *group, *tmp;
|
||||
|
|
|
|||
|
|
@ -115,8 +115,8 @@ struct pci_epf_driver {
|
|||
* @phys_addr: physical address that should be mapped to the BAR
|
||||
* @addr: virtual address corresponding to the @phys_addr
|
||||
* @size: the size of the address space present in BAR
|
||||
* @aligned_size: the size actually allocated to accommodate the iATU alignment
|
||||
* requirement
|
||||
* @mem_size: the size actually allocated to accommodate the iATU alignment
|
||||
* requirement
|
||||
* @barno: BAR number
|
||||
* @flags: flags that are set for the BAR
|
||||
*/
|
||||
|
|
@ -124,7 +124,7 @@ struct pci_epf_bar {
|
|||
dma_addr_t phys_addr;
|
||||
void *addr;
|
||||
size_t size;
|
||||
size_t aligned_size;
|
||||
size_t mem_size;
|
||||
enum pci_barno barno;
|
||||
int flags;
|
||||
};
|
||||
|
|
@ -242,6 +242,12 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
|
|||
void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar,
|
||||
enum pci_epc_interface_type type);
|
||||
|
||||
int pci_epf_assign_bar_space(struct pci_epf *epf, size_t size,
|
||||
enum pci_barno bar,
|
||||
const struct pci_epc_features *epc_features,
|
||||
enum pci_epc_interface_type type,
|
||||
dma_addr_t bar_addr);
|
||||
|
||||
int pci_epf_align_inbound_addr(struct pci_epf *epf, enum pci_barno bar,
|
||||
u64 addr, dma_addr_t *base, size_t *off);
|
||||
int pci_epf_bind(struct pci_epf *epf);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user