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net: stmmac: move and rename dwmac_pcs_isr()

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dwmac_pcs_isr() doesn't need to be inlined into the MAC's
host_irq_status method, as handling PCS interrupts isn't performance
critical. However, there is little point calling this function unless
an interrupt is pending for the PCS.

Rename it to stmmac_integrated_pcs_irq() while moving it.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vevHm-00000002YoS-23RX@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle) 2026-01-11 13:15:14 +00:00 committed by Jakub Kicinski
parent a2745a99ca
commit 879070eb4c
4 changed files with 39 additions and 32 deletions
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4
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
View File

@ -304,7 +304,9 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
x->irq_rx_path_exit_lpi_mode_n++;
}
dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
if (intr_status & (PCS_ANE_IRQ | PCS_LINK_IRQ))
stmmac_integrated_pcs_irq(ioaddr, GMAC_PCS_BASE, intr_status,
x);
return ret;
}

4
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
View File

@ -658,7 +658,9 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
x->irq_rx_path_exit_lpi_mode_n++;
}
dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
if (intr_status & (PCS_ANE_IRQ | PCS_LINK_IRQ))
stmmac_integrated_pcs_irq(ioaddr, GMAC_PCS_BASE, intr_status,
x);
return ret;
}

30
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
View File

@ -45,6 +45,36 @@ static const struct phylink_pcs_ops dwmac_integrated_pcs_ops = {
.pcs_config = dwmac_integrated_pcs_config,
};
/**
* stmmac_integrated_pcs_irq - TBI, RTBI, or SGMII PHY ISR
* @ioaddr: IO registers pointer
* @reg: Base address of the AN Control Register.
* @intr_status: GMAC core interrupt status
* @x: pointer to log these events as stats
* Description: it is the ISR for PCS events: Auto-Negotiation Completed and
* Link status.
*/
void stmmac_integrated_pcs_irq(void __iomem *ioaddr, u32 reg,
unsigned int intr_status,
struct stmmac_extra_stats *x)
{
u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
if (intr_status & PCS_ANE_IRQ) {
x->irq_pcs_ane_n++;
if (val & GMAC_AN_STATUS_ANC)
pr_info("stmmac_pcs: ANE process completed\n");
}
if (intr_status & PCS_LINK_IRQ) {
x->irq_pcs_link_n++;
if (val & GMAC_AN_STATUS_LS)
pr_info("stmmac_pcs: Link Up\n");
else
pr_info("stmmac_pcs: Link Down\n");
}
}
int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
u32 int_mask)
{

33
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
View File

@ -62,39 +62,12 @@ phylink_pcs_to_stmmac_pcs(struct phylink_pcs *pcs)
return container_of(pcs, struct stmmac_pcs, pcs);
}
void stmmac_integrated_pcs_irq(void __iomem *ioaddr, u32 reg,
unsigned int intr_status,
struct stmmac_extra_stats *x);
int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
u32 int_mask);
/**
* dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
* @ioaddr: IO registers pointer
* @reg: Base address of the AN Control Register.
* @intr_status: GMAC core interrupt status
* @x: pointer to log these events as stats
* Description: it is the ISR for PCS events: Auto-Negotiation Completed and
* Link status.
*/
static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
unsigned int intr_status,
struct stmmac_extra_stats *x)
{
u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
if (intr_status & PCS_ANE_IRQ) {
x->irq_pcs_ane_n++;
if (val & GMAC_AN_STATUS_ANC)
pr_info("stmmac_pcs: ANE process completed\n");
}
if (intr_status & PCS_LINK_IRQ) {
x->irq_pcs_link_n++;
if (val & GMAC_AN_STATUS_LS)
pr_info("stmmac_pcs: Link Up\n");
else
pr_info("stmmac_pcs: Link Down\n");
}
}
/**
* dwmac_ctrl_ane - To program the AN Control Register.
* @ioaddr: IO registers pointer