From 5607785b86eb345f1982ae6e319c6c5b8d477c68 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 31 Aug 2017 11:54:15 -0700 Subject: [PATCH 01/14] ARM: dts: cygnus: Add the CLCD controller This doesn't yet enable it on any particular platform, as we still need a panel driver for bcm911360_entphn. Signed-off-by: Eric Anholt Acked-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 7c957ea06c66..90a19770feae 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -473,6 +473,16 @@ ohci0: usb@18048800 { status = "disabled"; }; + clcd: clcd@180a0000 { + compatible = "arm,pl111", "arm,primecell"; + reg = <0x180a0000 0x1000>; + interrupts = ; + interrupt-names = "combined"; + clocks = <&axi41_clk>, <&apb_clk>; + clock-names = "clcdclk", "apb_pclk"; + status = "disabled"; + }; + v3d: v3d@180a2000 { compatible = "brcm,cygnus-v3d"; reg = <0x180a2000 0x1000>; From a7794db38ed826a2738f53b9b1e9c85cc0876fbe Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 31 Aug 2017 11:54:16 -0700 Subject: [PATCH 02/14] ARM: dts: cygnus: Add the PWM node This is connected up to the backlight on 911360_entphn, which we'll need for a panel driver. For now, leave the node disabled in the shared dtsi. Signed-off-by: Eric Anholt Acked-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 90a19770feae..d65311ff028f 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -585,6 +585,14 @@ adc: adc@180a6000 { status = "disabled"; }; + pwm: pwm@180aa500 { + compatible = "brcm,kona-pwm"; + reg = <0x180aa500 0xc4>; + #pwm-cells = <3>; + clocks = <&asiu_clks BCM_CYGNUS_ASIU_PWM_CLK>; + status = "disabled"; + }; + keypad: keypad@180ac000 { compatible = "brcm,bcm-keypad"; reg = <0x180ac000 0x14c>; From f08f58a2bf68900a84e782b8c7ad701c0654173c Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Fri, 6 Oct 2017 15:52:52 +0200 Subject: [PATCH 03/14] ARM: dts: bcm283x: Fix console path on RPi3 Contrary to other RPi devices, RPi3 uses uart0 to communicate with the BCM43438 bluetooth controller. uart1 is then used for the console. Today, the console configuration is inherited from the bcm283x dtsi (bootargs) which is not the correct one for the RPi3. This leads to routing issue and confuses the Bluetooth controller with unexpected data. This patch introduces chosen/stdout path to configure console to uart0 on bcm283x family and overwrite it to uart1 in the RPi3 dts. Create serial0/1 aliases referring to uart0 and uart1 paths. Remove unneeded earlyprintk. Fixes: 4188ea2aeb6d ("ARM: bcm283x: Define UART pinmuxing on board level") Signed-off-by: Loic Poulain Tested-by: Stefan Wahren Signed-off-by: Eric Anholt Reviewed-by: Eric Anholt --- arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 9 +++------ arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 5 +++++ arch/arm/boot/dts/bcm283x.dtsi | 7 ++++++- 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts index 82651c3eb682..b8565fc33eea 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts @@ -18,12 +18,9 @@ / { compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; model = "Raspberry Pi Zero W"; - /* Needed by firmware to properly init UARTs */ - aliases { - uart0 = "/soc/serial@7e201000"; - uart1 = "/soc/serial@7e215040"; - serial0 = "/soc/serial@7e201000"; - serial1 = "/soc/serial@7e215040"; + chosen { + /* 8250 auxiliary UART instead of pl011 */ + stdout-path = "serial1:115200n8"; }; leds { diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts index 20725ca487f3..c71a0d73d2a2 100644 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts @@ -8,6 +8,11 @@ / { compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; model = "Raspberry Pi 3 Model B"; + chosen { + /* 8250 auxiliary UART instead of pl011 */ + stdout-path = "serial1:115200n8"; + }; + memory { reg = <0 0x40000000>; }; diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 431dcfc900c0..013431e3d7c3 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -20,8 +20,13 @@ / { #address-cells = <1>; #size-cells = <1>; + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + chosen { - bootargs = "earlyprintk console=ttyAMA0"; + stdout-path = "serial0:115200n8"; }; thermal-zones { From fd3372db18d3d44ae4579243a8eacb5247d8c03a Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Wed, 30 Aug 2017 22:42:01 +0200 Subject: [PATCH 04/14] ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave Add BCM43438 (bluetooth) as a slave device of uart0 (pl011/ttyAMA0). This allows to automatically insert the bcm43438 to the bluetooth subsystem instead of relying on userspace helpers (hciattach). Overwrite chosen/stdout-path to use 8250 aux uart as console. Acked-by: Rob Herring Signed-off-by: Loic Poulain Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts index c71a0d73d2a2..ca588552f37b 100644 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts @@ -29,6 +29,11 @@ &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <2000000>; + }; }; /* uart1 is mapped to the pin header */ From 2460266f21f140936e627f28f28d1a4f30887ae9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Fri, 6 Oct 2017 10:52:35 +0200 Subject: [PATCH 05/14] ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul XWR-1200 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This info can be used by operating system to setup LED behavior. Reported-by: Dan Haab Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts index c544ab302012..ba1c19b1b3eb 100644 --- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts +++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts @@ -57,7 +57,8 @@ lan2 { usb { label = "bcm53xx:green:usb"; gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; - linux,default-trigger = "none"; + trigger-sources = <&ohci_port2>, <&ehci_port2>; + linux,default-trigger = "usbport"; }; status { From 1f4b0d5596d2e3ea8e953d578ab8444ce860d35d Mon Sep 17 00:00:00 2001 From: Dan Haab Date: Mon, 9 Oct 2017 09:46:22 -0600 Subject: [PATCH 06/14] ARM: dts: BCM5301X: Add DT for Luxul XBR-4500 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is BCM47094 (AKA BCM4709C0) based router with ports-on-the-front board design. Signed-off-by: Dan Haab Acked-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 63 +++++++++++++++++++ 2 files changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index faf46abaa4a2..563f8a4f1580 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4709-tplink-archer-c9-v1.dtb \ bcm47094-dlink-dir-885l.dtb \ bcm47094-linksys-panamera.dtb \ + bcm47094-luxul-xbr-4500.dtb \ bcm47094-luxul-xwr-3100.dtb \ bcm47094-netgear-r8500.dtb \ bcm94708.dtb \ diff --git a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts new file mode 100644 index 000000000000..15ffb1abc440 --- /dev/null +++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2017 Luxul Inc. + * + * Licensed under the ISC license. + */ + +/dts-v1/; + +#include "bcm4708.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" + +/ { + compatible = "luxul,xbr-4500-v1", "brcm,bcm47094", "brcm,bcm4708"; + model = "Luxul XBR-4500 V1"; + + chosen { + bootargs = "earlycon"; + }; + + memory { + reg = <0x00000000 0x08000000 + 0x88000000 0x18000000>; + }; + + leds { + compatible = "gpio-leds"; + + status { + label = "bcm53xx:green:status"; + gpios = <&chipcommon 20 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "timer"; + }; + + usb3 { + label = "bcm53xx:green:usb3"; + gpios = <&chipcommon 19 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>; + linux,default-trigger = "usbport"; + }; + + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&usb3 { + vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; +}; + +&spi_nor { + status = "okay"; +}; From 65f78c4c41a9b9a7637e1dda2d5e41cf26ea971c Mon Sep 17 00:00:00 2001 From: Dan Haab Date: Mon, 9 Oct 2017 09:46:23 -0600 Subject: [PATCH 07/14] ARM: dts: BCM5301X: Add DT for Luxul ABR-4500 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is BCM47094 (AKA BCM4709C0) based router with rear-facing ports board design. Signed-off-by: Dan Haab Acked-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 63 +++++++++++++++++++ 2 files changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 563f8a4f1580..2d964c9b08ee 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4709-tplink-archer-c9-v1.dtb \ bcm47094-dlink-dir-885l.dtb \ bcm47094-linksys-panamera.dtb \ + bcm47094-luxul-abr-4500.dtb \ bcm47094-luxul-xbr-4500.dtb \ bcm47094-luxul-xwr-3100.dtb \ bcm47094-netgear-r8500.dtb \ diff --git a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts new file mode 100644 index 000000000000..ecd22a246746 --- /dev/null +++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2017 Luxul Inc. + * + * Licensed under the ISC license. + */ + +/dts-v1/; + +#include "bcm4708.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" + +/ { + compatible = "luxul,abr-4500-v1", "brcm,bcm47094", "brcm,bcm4708"; + model = "Luxul ABR-4500 V1"; + + chosen { + bootargs = "earlycon"; + }; + + memory { + reg = <0x00000000 0x08000000 + 0x88000000 0x18000000>; + }; + + leds { + compatible = "gpio-leds"; + + status { + label = "bcm53xx:green:status"; + gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + + usb3 { + label = "bcm53xx:green:usb3"; + gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>; + linux,default-trigger = "usbport"; + }; + + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&usb3 { + vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; +}; + +&spi_nor { + status = "okay"; +}; From 0aa052ce1c3340850a7e5980b6d24b3ea5779591 Mon Sep 17 00:00:00 2001 From: Dan Haab Date: Mon, 9 Oct 2017 09:46:59 -0600 Subject: [PATCH 08/14] ARM: dts: BCM53573: Add DT for Luxul XAP-810 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is BCM53573 WiSoC based access point with an extra BCM43217 chipset used for 2.4 GHz. Signed-off-by: Dan Haab Acked-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 87 ++++++++++++++++++++ 2 files changed, 88 insertions(+) create mode 100644 arch/arm/boot/dts/bcm47189-luxul-xap-810.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 2d964c9b08ee..5cac283865df 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -110,6 +110,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm953012hr.dtb \ bcm953012k.dtb dtb-$(CONFIG_ARCH_BCM_53573) += \ + bcm47189-luxul-xap-810.dtb \ bcm47189-tenda-ac9.dtb \ bcm947189acdbmr.dtb dtb-$(CONFIG_ARCH_BCM_63XX) += \ diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts new file mode 100644 index 000000000000..214df18f3a75 --- /dev/null +++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts @@ -0,0 +1,87 @@ +/* + * Copyright 2017 Luxul Inc. + * + * Licensed under the ISC license. + */ + +/dts-v1/; + +#include "bcm53573.dtsi" + +/ { + compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573"; + model = "Luxul XAP-810 V1"; + + chosen { + bootargs = "earlycon"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + leds { + compatible = "gpio-leds"; + + 5ghz { + label = "bcm53xx:blue:5ghz"; + gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + system { + label = "bcm53xx:green:system"; + gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "timer"; + }; + }; + + pcie0_leds { + compatible = "gpio-leds"; + + 2ghz { + label = "bcm53xx:blue:2ghz"; + gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pcie0 { + ranges = <0x00000000 0 0 0 0 0x00100000>; + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0,0 { + reg = <0x0000 0 0 0 0>; + ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,1,0 { + reg = <0x0000 0 0 0 0>; + ranges = <0x00000000 0 0 0 0x00100000>; + #address-cells = <1>; + #size-cells = <1>; + + pcie0_chipcommon: chipcommon@0 { + reg = <0 0x1000>; + + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; +}; From 7030ea600d560026b91726f2eb79c856b813afa9 Mon Sep 17 00:00:00 2001 From: Dan Haab Date: Mon, 9 Oct 2017 09:47:00 -0600 Subject: [PATCH 09/14] ARM: dts: BCM53573: Add DT for Luxul XAP-1440 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is BCM53573 WiSoC based outdoor access point with an extra BCM43217 chipset used for 2.4 GHz. Signed-off-by: Dan Haab Acked-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 50 +++++++++++++++++++ 2 files changed, 51 insertions(+) create mode 100644 arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5cac283865df..1e1ad2fee346 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -110,6 +110,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm953012hr.dtb \ bcm953012k.dtb dtb-$(CONFIG_ARCH_BCM_53573) += \ + bcm47189-luxul-xap-1440.dtb \ bcm47189-luxul-xap-810.dtb \ bcm47189-tenda-ac9.dtb \ bcm947189acdbmr.dtb diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts new file mode 100644 index 000000000000..74c83b0ca54e --- /dev/null +++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts @@ -0,0 +1,50 @@ +/* + * Copyright 2017 Luxul Inc. + * + * Licensed under the ISC license. + */ + +/dts-v1/; + +#include "bcm53573.dtsi" + +/ { + compatible = "luxul,xap-1440-v1", "brcm,bcm47189", "brcm,bcm53573"; + model = "Luxul XAP-1440 V1"; + + chosen { + bootargs = "earlycon"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + leds { + compatible = "gpio-leds"; + + wlan { + label = "bcm53xx:blue:wlan"; + gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + + system { + label = "bcm53xx:green:system"; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; + }; + }; +}; From bc811c697b13dcb5abac9a410527859aca095a9c Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 28 Sep 2017 16:14:54 -0700 Subject: [PATCH 10/14] dt-bindings: Add documentation for Broadcom Hurricane 2 SoCs Add binding documentation for the Broadcom Hurricane 2 SoCs used in switching control planes. Acked-by: Jon Mason Signed-off-by: Florian Fainelli Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- .../devicetree/bindings/arm/bcm/brcm,hr2.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt new file mode 100644 index 000000000000..a124c7fc4dcd --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt @@ -0,0 +1,14 @@ +Broadcom Hurricane 2 device tree bindings +--------------------------------------- + +Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs +are based on Broadcom's iProc SoC architecture and feature a single core Cortex +A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND +flash and a PCIe attached integrated switching engine. + +Boards with Hurricane SoCs shall have the following properties: + +Required root node property: + +BCM53342 +compatible = "brcm,bcm53342", "brcm,hr2"; From c6d2efd12744fc4c9c620eab9a92b0c4e9f5e4bd Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 28 Sep 2017 16:14:56 -0700 Subject: [PATCH 11/14] dt-bindings: Document Broadcom Hurricane 2 clocks Add a Device Tree binding document for the Broadcom Hurricane 2 SoC which is an iProc based system. Acked-by: Jon Mason Signed-off-by: Florian Fainelli Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- .../bindings/clock/brcm,iproc-clocks.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt index f2c5f0e4a363..f8e4a93466cb 100644 --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt @@ -137,6 +137,20 @@ These clock IDs are defined in: ch1_audio audiopll 2 BCM_CYGNUS_AUDIOPLL_CH1 ch2_audio audiopll 3 BCM_CYGNUS_AUDIOPLL_CH2 +Hurricane 2 +------ +PLL and leaf clock compatible strings for Hurricane 2 are: + "brcm,hr2-armpll" + +The following table defines the set of PLL/clock for Hurricane 2: + + Clock Source Index ID + --- ----- ----- --------- + crystal N/A N/A N/A + + armpll crystal N/A N/A + + Northstar and Northstar Plus ------ PLL and leaf clock compatible strings for Northstar and Northstar Plus are: From b9099ec754b5aaa6bbc2abcfc27da8b48b3dcfd3 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 28 Sep 2017 16:14:58 -0700 Subject: [PATCH 12/14] ARM: dts: Add Broadcom Hurricane 2 DTS include file Describe the Broadcom Hurricane 2 SoC comprised of a Cortex-A9 CPU complex along with standard iProc peripherals: * timers * SPI controller * NAND controller * a single AMAC (Ethernet MAC controller) * dual PCIe controllers The design is largely similar to existing iProc-based SoCs such as Northstar Plus. Acked-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-hr2.dtsi | 368 +++++++++++++++++++++++++++++++++ 1 file changed, 368 insertions(+) create mode 100644 arch/arm/boot/dts/bcm-hr2.dtsi diff --git a/arch/arm/boot/dts/bcm-hr2.dtsi b/arch/arm/boot/dts/bcm-hr2.dtsi new file mode 100644 index 000000000000..3f9cedd8011f --- /dev/null +++ b/arch/arm/boot/dts/bcm-hr2.dtsi @@ -0,0 +1,368 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +/ { + compatible = "brcm,hr2"; + model = "Broadcom Hurricane 2 SoC"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x0>; + }; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>; + }; + + mpcore@19000000 { + compatible = "simple-bus"; + ranges = <0x00000000 0x19000000 0x00023000>; + #address-cells = <1>; + #size-cells = <1>; + + a9pll: arm_clk@0 { + #clock-cells = <0>; + compatible = "brcm,hr2-armpll"; + clocks = <&osc>; + reg = <0x0 0x1000>; + }; + + timer@20200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x20200 0x100>; + interrupts = ; + clocks = <&periph_clk>; + }; + + twd-timer@20600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x20600 0x20>; + interrupts = ; + clocks = <&periph_clk>; + }; + + twd-watchdog@20620 { + compatible = "arm,cortex-a9-twd-wdt"; + reg = <0x20620 0x20>; + interrupts = ; + clocks = <&periph_clk>; + }; + + gic: interrupt-controller@21000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x21000 0x1000>, + <0x20100 0x100>; + }; + + L2: l2-cache@22000 { + compatible = "arm,pl310-cache"; + reg = <0x22000 0x1000>; + cache-unified; + cache-level = <2>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + }; + + periph_clk: periph_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&a9pll>; + clock-div = <2>; + clock-mult = <1>; + }; + }; + + axi@18000000 { + compatible = "simple-bus"; + ranges = <0x00000000 0x18000000 0x0011c40c>; + #address-cells = <1>; + #size-cells = <1>; + + uart0: serial@300 { + compatible = "ns16550a"; + reg = <0x0300 0x100>; + interrupts = ; + clocks = <&osc>; + status = "disabled"; + }; + + uart1: serial@400 { + compatible = "ns16550a"; + reg = <0x0400 0x100>; + interrupts = ; + clocks = <&osc>; + status = "disabled"; + }; + + dma@20000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + status = "disabled"; + }; + + amac0: ethernet@22000 { + compatible = "brcm,nsp-amac"; + reg = <0x22000 0x1000>, + <0x110000 0x1000>; + reg-names = "amac_base", "idm_base"; + interrupts = ; + status = "disabled"; + }; + + nand: nand@26000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x26000 0x600>, + <0x11b408 0x600>, + <0x026f00 0x20>; + reg-names = "nand", "iproc-idm", "iproc-ext"; + interrupts = ; + + #address-cells = <1>; + #size-cells = <0>; + + brcm,nand-has-wp; + }; + + gpiob: gpio@30000 { + compatible = "brcm,iproc-hr2-gpio", "brcm,iproc-gpio"; + reg = <0x30000 0x50>; + #gpio-cells = <2>; + gpio-controller; + ngpios = <4>; + interrupt-controller; + interrupts = ; + }; + + pwm: pwm@31000 { + compatible = "brcm,iproc-pwm"; + reg = <0x31000 0x28>; + clocks = <&osc>; + #pwm-cells = <3>; + status = "disabled"; + }; + + rng: rng@33000 { + compatible = "brcm,bcm-nsp-rng"; + reg = <0x33000 0x14>; + }; + + qspi: qspi@27200 { + compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; + reg = <0x027200 0x184>, + <0x027000 0x124>, + <0x11c408 0x004>, + <0x0273a0 0x01c>; + reg-names = "mspi", "bspi", "intr_regs", + "intr_status_reg"; + interrupts = , + , + , + , + , + , + ; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overhead", + "mspi_done", + "mspi_halted"; + num-cs = <2>; + #address-cells = <1>; + #size-cells = <0>; + + /* partitions defined in board DTS */ + }; + + ccbtimer0: timer@34000 { + compatible = "arm,sp804"; + reg = <0x34000 0x1000>; + interrupts = , + ; + }; + + ccbtimer1: timer@35000 { + compatible = "arm,sp804"; + reg = <0x35000 0x1000>; + interrupts = , + ; + }; + + i2c0: i2c@38000 { + compatible = "brcm,iproc-i2c"; + reg = <0x38000 0x50>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + }; + + watchdog@39000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x39000 0x1000>; + interrupts = ; + }; + + i2c1: i2c@3b000 { + compatible = "brcm,iproc-i2c"; + reg = <0x3b000 0x50>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + }; + }; + + pflash: nor@20000000 { + compatible = "cfi-flash", "jedec-flash"; + reg = <0x20000000 0x04000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + /* partitions defined in board DTS */ + }; + + pcie0: pcie@18012000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18012000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_NONE>; + + linux,pci-domain = <0>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + + /* Note: The HW does not support I/O resources. So, + * only the memory resource range is being specified. + */ + ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>; + + status = "disabled"; + + msi-parent = <&msi0>; + msi0: msi-controller { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + brcm,pcie-msi-inten; + }; + }; + + pcie1: pcie@18013000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18013000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_NONE>; + + linux,pci-domain = <1>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + + /* Note: The HW does not support I/O resources. So, + * only the memory resource range is being specified. + */ + ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>; + + status = "disabled"; + + msi-parent = <&msi1>; + msi1: msi-controller { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + brcm,pcie-msi-inten; + }; + }; +}; From e6ac8fc0823f9227a6ce65481adcbdbf529acfb9 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 28 Sep 2017 16:15:00 -0700 Subject: [PATCH 13/14] dt-bindings: Add Ubiquiti Networks vendor prefix Use the stock ticker: UBNT as the vendor prefix for Ubiquiti Networks. Acked-by: Jon Mason Signed-off-by: Florian Fainelli Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 1ea1fd4232ab..91b6b5b36d4c 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -351,6 +351,7 @@ truly Truly Semiconductors Limited tsd Theobroma Systems Design und Consulting GmbH tyan Tyan Computer Corporation ucrobotics uCRobotics +ubnt Ubiquiti Networks udoo Udoo uniwest United Western Technologies Corp (UniWest) upisemi uPI Semiconductor Corp. From bc79cce741fab70968141c67974f8e99e31aec47 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 28 Sep 2017 16:15:01 -0700 Subject: [PATCH 14/14] ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8 Add basic board support for the Ubiquiti UniFi Switch 8 port model. This is a small home and office use managed switch based on the BCM53342 switching control SoC. Acked-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 2 + .../boot/dts/bcm53340-ubnt-unifi-switch8.dts | 85 +++++++++++++++++++ 2 files changed, 87 insertions(+) create mode 100644 arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 1e1ad2fee346..409fd5a3d239 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -121,6 +121,8 @@ dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ bcm911360k.dtb \ bcm958300k.dtb \ bcm958305k.dtb +dtb-$(CONFIG_ARCH_BCM_HR2) += \ + bcm53340-ubnt-unifi-switch8.dtb dtb-$(CONFIG_ARCH_BCM_MOBILE) += \ bcm28155-ap.dtb \ bcm21664-garnet.dtb \ diff --git a/arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts b/arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts new file mode 100644 index 000000000000..431cda514230 --- /dev/null +++ b/arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts @@ -0,0 +1,85 @@ +/* + * DTS for Unifi Switch 8 port + * + * Copyright (C) 2017 Florian Fainelli + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/dts-v1/; + +#include "bcm-hr2.dtsi" + +/ { + compatible = "ubnt,unifi-switch8", "brcm,bcm53342", "brcm,hr2"; + model = "Ubiquiti UniFi Switch 8 (BCM53342)"; + + /* Hurricane 2 designs use the second UART */ + chosen { + bootargs = "console=ttyS1,115200 earlyprintk"; + }; + + memory@0 { + reg = <0x00000000 0x08000000>, + <0x68000000 0x08000000>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&qspi { + status = "okay"; + bspi-sel = <0>; + + flash: m25p80@0 { + compatible = "m25p80"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <12500000>; + spi-cpol; + spi-cpha; + + partition@0 { + label = "u-boot"; + reg = <0x0 0xc0000>; + }; + + partition@c0000 { + label = "u-boot-env"; + reg = <0xc0000 0x10000>; + }; + + partition@d0000 { + label = "shmoo"; + reg = <0xd0000 0x10000>; + }; + + partition@e0000 { + label = "kernel0"; + reg = <0xe0000 0xf00000>; + }; + + partition@fe0000 { + label = "kernel1"; + reg = <0xfe0000 0xf10000>; + }; + + partition@1ef0000 { + label = "cfg"; + reg = <0x1ef0000 0x100000>; + }; + + partition@1ff0000 { + label = "EEPROM"; + reg = <0x1ff0000 0x10000>; + }; + }; +}; + +&pcie0 { + /* Attaches to the internal switch */ + status = "okay"; +};