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perf arm_spe: Decode ASE and FP fields in other operation
Add a check for other operation, which prevents any incorrectly classifying. Parse the ASE and FP fields. After: . 0000002f: 48 06 OTHER ASE FP INSN-OTHER . 00000031: b2 08 80 48 01 08 00 ff ff VA 0xffff000801488008 . 0000003a: 9a 00 00 LAT 0 XLAT . 0000003d: 42 16 EV RETIRED L1D-ACCESS TLB-ACCESS Signed-off-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: James Clark <james.clark@linaro.org> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
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@ -351,8 +351,12 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
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arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP");
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if (payload & SPE_OP_PKT_SVE_PRED)
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arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED");
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} else {
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} else if (SPE_OP_PKT_OTHER_SUBCLASS_OTHER(payload)) {
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arm_spe_pkt_out_string(&err, &buf, &buf_len, "OTHER");
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if (payload & SPE_OP_PKT_OTHER_ASE)
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arm_spe_pkt_out_string(&err, &buf, &buf_len, " ASE");
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if (payload & SPE_OP_PKT_OTHER_FP)
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arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP");
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arm_spe_pkt_out_string(&err, &buf, &buf_len, " %s",
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payload & SPE_OP_PKT_COND ?
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"COND-SELECT" : "INSN-OTHER");
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@ -123,8 +123,12 @@ enum arm_spe_events {
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#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1
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#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2
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#define SPE_OP_PKT_OTHER_SUBCLASS_OTHER(v) (((v) & GENMASK_ULL(7, 3)) == 0x0)
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#define SPE_OP_PKT_OTHER_SUBCLASS_SVE(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8)
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#define SPE_OP_PKT_OTHER_ASE BIT(2)
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#define SPE_OP_PKT_OTHER_FP BIT(1)
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#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG(v) (((v) & GENMASK_ULL(7, 1)) == 0x0)
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#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(v) (((v) & GENMASK_ULL(7, 1)) == 0x4)
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#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(v) (((v) & GENMASK_ULL(7, 1)) == 0x10)
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