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KVM: x86: Use only local variables (no bitmask) to init kvm_cpu_caps
Refactor the kvm_cpu_cap_init() macro magic to collect supported features in a local variable instead of passing them to the macro as a "mask". As pointed out by Maxim, relying on macros to "return" a value and set local variables is surprising, as the bitwise-OR logic suggests the macros are pure, i.e. have no side effects. Ideally, the feature initializers would have zero side effects, e.g. would take local variables as params, but there isn't a sane way to do so without either sacrificing the various compile-time assertions (basically a non-starter), or passing at least one variable, e.g. a struct, to each macro usage (adds a lot of noise and boilerplate code). Opportunistically force callers to emit a trailing comma by intentionally omitting a semicolon after invoking the feature initializers. Forcing a trailing comma isotales futures changes to a single line, i.e. doesn't cause churn for unrelated features/lines when adding/removing/modifying a feature. No functional change intended. Suggested-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20241128013424.4096668-58-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
Sean Christopherson
parent
ac9d1b7591
commit
871ac338ef
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@ -682,7 +682,7 @@ static __always_inline u32 raw_cpuid_get(struct cpuid_reg cpuid)
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* capabilities as well as raw CPUID. For KVM-defined leafs, consult only raw
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* CPUID, as KVM is the one and only authority (in the kernel).
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*/
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#define kvm_cpu_cap_init(leaf, mask) \
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#define kvm_cpu_cap_init(leaf, feature_initializers...) \
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do { \
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const struct cpuid_reg cpuid = x86_feature_cpuid(leaf * 32); \
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const u32 __maybe_unused kvm_cpu_cap_init_in_progress = leaf; \
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@ -690,8 +690,11 @@ do { \
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u32 kvm_cpu_cap_passthrough = 0; \
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u32 kvm_cpu_cap_synthesized = 0; \
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u32 kvm_cpu_cap_emulated = 0; \
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u32 kvm_cpu_cap_features = 0; \
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\
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kvm_cpu_caps[leaf] = (mask); \
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feature_initializers \
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\
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kvm_cpu_caps[leaf] = kvm_cpu_cap_features; \
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\
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if (leaf < NCAPINTS) \
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kvm_cpu_caps[leaf] &= kernel_cpu_caps[leaf]; \
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@ -717,7 +720,7 @@ do { \
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#define F(name) \
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({ \
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KVM_VALIDATE_CPU_CAP_USAGE(name); \
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feature_bit(name); \
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kvm_cpu_cap_features |= feature_bit(name); \
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})
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/* Scattered Flag - For features that are scattered by cpufeatures.h. */
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@ -725,14 +728,16 @@ do { \
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({ \
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BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES); \
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KVM_VALIDATE_CPU_CAP_USAGE(name); \
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(boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0); \
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if (boot_cpu_has(X86_FEATURE_##name)) \
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F(name); \
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})
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/* Features that KVM supports only on 64-bit kernels. */
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#define X86_64_F(name) \
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({ \
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KVM_VALIDATE_CPU_CAP_USAGE(name); \
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(IS_ENABLED(CONFIG_X86_64) ? F(name) : 0); \
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if (IS_ENABLED(CONFIG_X86_64)) \
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F(name); \
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})
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/*
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@ -741,7 +746,7 @@ do { \
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*/
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#define EMULATED_F(name) \
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({ \
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kvm_cpu_cap_emulated |= F(name); \
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kvm_cpu_cap_emulated |= feature_bit(name); \
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F(name); \
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})
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@ -752,7 +757,7 @@ do { \
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*/
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#define SYNTHESIZED_F(name) \
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({ \
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kvm_cpu_cap_synthesized |= F(name); \
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kvm_cpu_cap_synthesized |= feature_bit(name); \
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F(name); \
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})
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@ -764,7 +769,7 @@ do { \
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*/
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#define PASSTHROUGH_F(name) \
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({ \
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kvm_cpu_cap_passthrough |= F(name); \
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kvm_cpu_cap_passthrough |= feature_bit(name); \
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F(name); \
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})
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@ -776,7 +781,7 @@ do { \
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({ \
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BUILD_BUG_ON(__feature_leaf(X86_FEATURE_##name) != CPUID_1_EDX); \
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BUILD_BUG_ON(kvm_cpu_cap_init_in_progress != CPUID_8000_0001_EDX); \
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feature_bit(name); \
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kvm_cpu_cap_features |= feature_bit(name); \
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})
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/*
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@ -786,7 +791,6 @@ do { \
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#define VENDOR_F(name) \
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({ \
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KVM_VALIDATE_CPU_CAP_USAGE(name); \
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0; \
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})
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/*
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@ -796,7 +800,6 @@ do { \
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#define RUNTIME_F(name) \
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({ \
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KVM_VALIDATE_CPU_CAP_USAGE(name); \
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0; \
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})
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/*
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@ -816,126 +819,128 @@ void kvm_set_cpu_caps(void)
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sizeof(boot_cpu_data.x86_capability));
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kvm_cpu_cap_init(CPUID_1_ECX,
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F(XMM3) |
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F(PCLMULQDQ) |
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VENDOR_F(DTES64) |
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F(XMM3),
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F(PCLMULQDQ),
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VENDOR_F(DTES64),
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/*
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* NOTE: MONITOR (and MWAIT) are emulated as NOP, but *not*
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* advertised to guests via CPUID! MWAIT is also technically a
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* runtime flag thanks to IA32_MISC_ENABLES; mark it as such so
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* that KVM is aware that it's a known, unadvertised flag.
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*/
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RUNTIME_F(MWAIT) |
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VENDOR_F(VMX) |
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0 /* DS-CPL, SMX, EST */ |
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0 /* TM2 */ |
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F(SSSE3) |
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0 /* CNXT-ID */ |
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0 /* Reserved */ |
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F(FMA) |
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F(CX16) |
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0 /* xTPR Update */ |
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F(PDCM) |
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F(PCID) |
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0 /* Reserved, DCA */ |
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F(XMM4_1) |
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F(XMM4_2) |
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EMULATED_F(X2APIC) |
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F(MOVBE) |
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F(POPCNT) |
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EMULATED_F(TSC_DEADLINE_TIMER) |
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F(AES) |
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F(XSAVE) |
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RUNTIME_F(OSXSAVE) |
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F(AVX) |
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F(F16C) |
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F(RDRAND) |
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EMULATED_F(HYPERVISOR)
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RUNTIME_F(MWAIT),
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/* DS-CPL */
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VENDOR_F(VMX),
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/* SMX, EST */
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/* TM2 */
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F(SSSE3),
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/* CNXT-ID */
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/* Reserved */
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F(FMA),
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F(CX16),
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/* xTPR Update */
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F(PDCM),
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F(PCID),
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/* Reserved, DCA */
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F(XMM4_1),
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F(XMM4_2),
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EMULATED_F(X2APIC),
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F(MOVBE),
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F(POPCNT),
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EMULATED_F(TSC_DEADLINE_TIMER),
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F(AES),
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F(XSAVE),
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RUNTIME_F(OSXSAVE),
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F(AVX),
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F(F16C),
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F(RDRAND),
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EMULATED_F(HYPERVISOR),
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);
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kvm_cpu_cap_init(CPUID_1_EDX,
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F(FPU) |
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F(VME) |
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F(DE) |
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F(PSE) |
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F(TSC) |
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F(MSR) |
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F(PAE) |
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F(MCE) |
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F(CX8) |
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F(APIC) |
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0 /* Reserved */ |
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F(SEP) |
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F(MTRR) |
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F(PGE) |
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F(MCA) |
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F(CMOV) |
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F(PAT) |
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F(PSE36) |
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0 /* PSN */ |
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F(CLFLUSH) |
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0 /* Reserved */ |
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VENDOR_F(DS) |
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0 /* ACPI */ |
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F(MMX) |
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F(FXSR) |
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F(XMM) |
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F(XMM2) |
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F(SELFSNOOP) |
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0 /* HTT, TM, Reserved, PBE */
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F(FPU),
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F(VME),
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F(DE),
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F(PSE),
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F(TSC),
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F(MSR),
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F(PAE),
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F(MCE),
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F(CX8),
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F(APIC),
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/* Reserved */
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F(SEP),
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F(MTRR),
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F(PGE),
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F(MCA),
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F(CMOV),
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F(PAT),
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F(PSE36),
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/* PSN */
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F(CLFLUSH),
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/* Reserved */
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VENDOR_F(DS),
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/* ACPI */
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F(MMX),
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F(FXSR),
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F(XMM),
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F(XMM2),
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F(SELFSNOOP),
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/* HTT, TM, Reserved, PBE */
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);
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kvm_cpu_cap_init(CPUID_7_0_EBX,
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F(FSGSBASE) |
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EMULATED_F(TSC_ADJUST) |
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F(SGX) |
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F(BMI1) |
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F(HLE) |
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F(AVX2) |
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F(FDP_EXCPTN_ONLY) |
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F(SMEP) |
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F(BMI2) |
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F(ERMS) |
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F(INVPCID) |
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F(RTM) |
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F(ZERO_FCS_FDS) |
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VENDOR_F(MPX) |
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F(AVX512F) |
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F(AVX512DQ) |
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F(RDSEED) |
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F(ADX) |
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F(SMAP) |
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F(AVX512IFMA) |
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F(CLFLUSHOPT) |
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F(CLWB) |
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VENDOR_F(INTEL_PT) |
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F(AVX512PF) |
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F(AVX512ER) |
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F(AVX512CD) |
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F(SHA_NI) |
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F(AVX512BW) |
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F(AVX512VL));
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F(FSGSBASE),
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EMULATED_F(TSC_ADJUST),
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F(SGX),
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F(BMI1),
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F(HLE),
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F(AVX2),
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F(FDP_EXCPTN_ONLY),
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F(SMEP),
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F(BMI2),
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F(ERMS),
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F(INVPCID),
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F(RTM),
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F(ZERO_FCS_FDS),
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VENDOR_F(MPX),
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F(AVX512F),
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F(AVX512DQ),
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F(RDSEED),
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F(ADX),
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F(SMAP),
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F(AVX512IFMA),
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F(CLFLUSHOPT),
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F(CLWB),
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VENDOR_F(INTEL_PT),
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F(AVX512PF),
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F(AVX512ER),
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F(AVX512CD),
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F(SHA_NI),
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F(AVX512BW),
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F(AVX512VL),
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);
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kvm_cpu_cap_init(CPUID_7_ECX,
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F(AVX512VBMI) |
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PASSTHROUGH_F(LA57) |
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F(PKU) |
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RUNTIME_F(OSPKE) |
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F(RDPID) |
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F(AVX512_VPOPCNTDQ) |
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F(UMIP) |
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F(AVX512_VBMI2) |
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F(GFNI) |
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F(VAES) |
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F(VPCLMULQDQ) |
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F(AVX512_VNNI) |
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F(AVX512_BITALG) |
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F(CLDEMOTE) |
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F(MOVDIRI) |
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F(MOVDIR64B) |
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VENDOR_F(WAITPKG) |
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F(SGX_LC) |
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F(BUS_LOCK_DETECT)
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F(AVX512VBMI),
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PASSTHROUGH_F(LA57),
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F(PKU),
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RUNTIME_F(OSPKE),
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F(RDPID),
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F(AVX512_VPOPCNTDQ),
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F(UMIP),
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F(AVX512_VBMI2),
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F(GFNI),
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F(VAES),
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F(VPCLMULQDQ),
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F(AVX512_VNNI),
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F(AVX512_BITALG),
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F(CLDEMOTE),
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F(MOVDIRI),
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F(MOVDIR64B),
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VENDOR_F(WAITPKG),
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F(SGX_LC),
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F(BUS_LOCK_DETECT),
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);
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/*
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@ -946,22 +951,22 @@ void kvm_set_cpu_caps(void)
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kvm_cpu_cap_clear(X86_FEATURE_PKU);
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kvm_cpu_cap_init(CPUID_7_EDX,
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F(AVX512_4VNNIW) |
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F(AVX512_4FMAPS) |
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F(SPEC_CTRL) |
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F(SPEC_CTRL_SSBD) |
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EMULATED_F(ARCH_CAPABILITIES) |
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F(INTEL_STIBP) |
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F(MD_CLEAR) |
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F(AVX512_VP2INTERSECT) |
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F(FSRM) |
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F(SERIALIZE) |
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F(TSXLDTRK) |
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F(AVX512_FP16) |
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F(AMX_TILE) |
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F(AMX_INT8) |
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F(AMX_BF16) |
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F(FLUSH_L1D)
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F(AVX512_4VNNIW),
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F(AVX512_4FMAPS),
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F(SPEC_CTRL),
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F(SPEC_CTRL_SSBD),
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EMULATED_F(ARCH_CAPABILITIES),
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F(INTEL_STIBP),
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F(MD_CLEAR),
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F(AVX512_VP2INTERSECT),
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F(FSRM),
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F(SERIALIZE),
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F(TSXLDTRK),
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F(AVX512_FP16),
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F(AMX_TILE),
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F(AMX_INT8),
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F(AMX_BF16),
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F(FLUSH_L1D),
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);
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if (boot_cpu_has(X86_FEATURE_AMD_IBPB_RET) &&
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@ -974,132 +979,132 @@ void kvm_set_cpu_caps(void)
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kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
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kvm_cpu_cap_init(CPUID_7_1_EAX,
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F(SHA512) |
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F(SM3) |
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F(SM4) |
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F(AVX_VNNI) |
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F(AVX512_BF16) |
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F(CMPCCXADD) |
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F(FZRM) |
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F(FSRS) |
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F(FSRC) |
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F(AMX_FP16) |
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F(AVX_IFMA) |
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F(LAM)
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F(SHA512),
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F(SM3),
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F(SM4),
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F(AVX_VNNI),
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F(AVX512_BF16),
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F(CMPCCXADD),
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F(FZRM),
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F(FSRS),
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F(FSRC),
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F(AMX_FP16),
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F(AVX_IFMA),
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F(LAM),
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);
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kvm_cpu_cap_init(CPUID_7_1_EDX,
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F(AVX_VNNI_INT8) |
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F(AVX_NE_CONVERT) |
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F(AMX_COMPLEX) |
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F(AVX_VNNI_INT16) |
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F(PREFETCHITI) |
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F(AVX10)
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F(AVX_VNNI_INT8),
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F(AVX_NE_CONVERT),
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F(AMX_COMPLEX),
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F(AVX_VNNI_INT16),
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F(PREFETCHITI),
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F(AVX10),
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);
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kvm_cpu_cap_init(CPUID_7_2_EDX,
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F(INTEL_PSFD) |
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F(IPRED_CTRL) |
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F(RRSBA_CTRL) |
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F(DDPD_U) |
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F(BHI_CTRL) |
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F(MCDT_NO)
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F(INTEL_PSFD),
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F(IPRED_CTRL),
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F(RRSBA_CTRL),
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F(DDPD_U),
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F(BHI_CTRL),
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F(MCDT_NO),
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);
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kvm_cpu_cap_init(CPUID_D_1_EAX,
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F(XSAVEOPT) |
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F(XSAVEC) |
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F(XGETBV1) |
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F(XSAVES) |
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X86_64_F(XFD)
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F(XSAVEOPT),
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F(XSAVEC),
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F(XGETBV1),
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F(XSAVES),
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X86_64_F(XFD),
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);
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kvm_cpu_cap_init(CPUID_12_EAX,
|
||||
SCATTERED_F(SGX1) |
|
||||
SCATTERED_F(SGX2) |
|
||||
SCATTERED_F(SGX_EDECCSSA)
|
||||
SCATTERED_F(SGX1),
|
||||
SCATTERED_F(SGX2),
|
||||
SCATTERED_F(SGX_EDECCSSA),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_24_0_EBX,
|
||||
F(AVX10_128) |
|
||||
F(AVX10_256) |
|
||||
F(AVX10_512)
|
||||
F(AVX10_128),
|
||||
F(AVX10_256),
|
||||
F(AVX10_512),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_0001_ECX,
|
||||
F(LAHF_LM) |
|
||||
F(CMP_LEGACY) |
|
||||
VENDOR_F(SVM) |
|
||||
0 /* ExtApicSpace */ |
|
||||
F(CR8_LEGACY) |
|
||||
F(ABM) |
|
||||
F(SSE4A) |
|
||||
F(MISALIGNSSE) |
|
||||
F(3DNOWPREFETCH) |
|
||||
F(OSVW) |
|
||||
0 /* IBS */ |
|
||||
F(XOP) |
|
||||
0 /* SKINIT, WDT, LWP */ |
|
||||
F(FMA4) |
|
||||
F(TBM) |
|
||||
F(TOPOEXT) |
|
||||
VENDOR_F(PERFCTR_CORE)
|
||||
F(LAHF_LM),
|
||||
F(CMP_LEGACY),
|
||||
VENDOR_F(SVM),
|
||||
/* ExtApicSpace */
|
||||
F(CR8_LEGACY),
|
||||
F(ABM),
|
||||
F(SSE4A),
|
||||
F(MISALIGNSSE),
|
||||
F(3DNOWPREFETCH),
|
||||
F(OSVW),
|
||||
/* IBS */
|
||||
F(XOP),
|
||||
/* SKINIT, WDT, LWP */
|
||||
F(FMA4),
|
||||
F(TBM),
|
||||
F(TOPOEXT),
|
||||
VENDOR_F(PERFCTR_CORE),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_0001_EDX,
|
||||
ALIASED_1_EDX_F(FPU) |
|
||||
ALIASED_1_EDX_F(VME) |
|
||||
ALIASED_1_EDX_F(DE) |
|
||||
ALIASED_1_EDX_F(PSE) |
|
||||
ALIASED_1_EDX_F(TSC) |
|
||||
ALIASED_1_EDX_F(MSR) |
|
||||
ALIASED_1_EDX_F(PAE) |
|
||||
ALIASED_1_EDX_F(MCE) |
|
||||
ALIASED_1_EDX_F(CX8) |
|
||||
ALIASED_1_EDX_F(APIC) |
|
||||
0 /* Reserved */ |
|
||||
F(SYSCALL) |
|
||||
ALIASED_1_EDX_F(MTRR) |
|
||||
ALIASED_1_EDX_F(PGE) |
|
||||
ALIASED_1_EDX_F(MCA) |
|
||||
ALIASED_1_EDX_F(CMOV) |
|
||||
ALIASED_1_EDX_F(PAT) |
|
||||
ALIASED_1_EDX_F(PSE36) |
|
||||
0 /* Reserved */ |
|
||||
F(NX) |
|
||||
0 /* Reserved */ |
|
||||
F(MMXEXT) |
|
||||
ALIASED_1_EDX_F(MMX) |
|
||||
ALIASED_1_EDX_F(FXSR) |
|
||||
F(FXSR_OPT) |
|
||||
X86_64_F(GBPAGES) |
|
||||
F(RDTSCP) |
|
||||
0 /* Reserved */ |
|
||||
X86_64_F(LM) |
|
||||
F(3DNOWEXT) |
|
||||
F(3DNOW)
|
||||
ALIASED_1_EDX_F(FPU),
|
||||
ALIASED_1_EDX_F(VME),
|
||||
ALIASED_1_EDX_F(DE),
|
||||
ALIASED_1_EDX_F(PSE),
|
||||
ALIASED_1_EDX_F(TSC),
|
||||
ALIASED_1_EDX_F(MSR),
|
||||
ALIASED_1_EDX_F(PAE),
|
||||
ALIASED_1_EDX_F(MCE),
|
||||
ALIASED_1_EDX_F(CX8),
|
||||
ALIASED_1_EDX_F(APIC),
|
||||
/* Reserved */
|
||||
F(SYSCALL),
|
||||
ALIASED_1_EDX_F(MTRR),
|
||||
ALIASED_1_EDX_F(PGE),
|
||||
ALIASED_1_EDX_F(MCA),
|
||||
ALIASED_1_EDX_F(CMOV),
|
||||
ALIASED_1_EDX_F(PAT),
|
||||
ALIASED_1_EDX_F(PSE36),
|
||||
/* Reserved */
|
||||
F(NX),
|
||||
/* Reserved */
|
||||
F(MMXEXT),
|
||||
ALIASED_1_EDX_F(MMX),
|
||||
ALIASED_1_EDX_F(FXSR),
|
||||
F(FXSR_OPT),
|
||||
X86_64_F(GBPAGES),
|
||||
F(RDTSCP),
|
||||
/* Reserved */
|
||||
X86_64_F(LM),
|
||||
F(3DNOWEXT),
|
||||
F(3DNOW),
|
||||
);
|
||||
|
||||
if (!tdp_enabled && IS_ENABLED(CONFIG_X86_64))
|
||||
kvm_cpu_cap_set(X86_FEATURE_GBPAGES);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_0007_EDX,
|
||||
SCATTERED_F(CONSTANT_TSC)
|
||||
SCATTERED_F(CONSTANT_TSC),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_0008_EBX,
|
||||
F(CLZERO) |
|
||||
F(XSAVEERPTR) |
|
||||
F(WBNOINVD) |
|
||||
F(AMD_IBPB) |
|
||||
F(AMD_IBRS) |
|
||||
F(AMD_SSBD) |
|
||||
F(VIRT_SSBD) |
|
||||
F(AMD_SSB_NO) |
|
||||
F(AMD_STIBP) |
|
||||
F(AMD_STIBP_ALWAYS_ON) |
|
||||
F(AMD_PSFD) |
|
||||
F(AMD_IBPB_RET)
|
||||
F(CLZERO),
|
||||
F(XSAVEERPTR),
|
||||
F(WBNOINVD),
|
||||
F(AMD_IBPB),
|
||||
F(AMD_IBRS),
|
||||
F(AMD_SSBD),
|
||||
F(VIRT_SSBD),
|
||||
F(AMD_SSB_NO),
|
||||
F(AMD_STIBP),
|
||||
F(AMD_STIBP_ALWAYS_ON),
|
||||
F(AMD_PSFD),
|
||||
F(AMD_IBPB_RET),
|
||||
);
|
||||
|
||||
/*
|
||||
|
|
@ -1131,30 +1136,30 @@ void kvm_set_cpu_caps(void)
|
|||
|
||||
/* All SVM features required additional vendor module enabling. */
|
||||
kvm_cpu_cap_init(CPUID_8000_000A_EDX,
|
||||
VENDOR_F(NPT) |
|
||||
VENDOR_F(VMCBCLEAN) |
|
||||
VENDOR_F(FLUSHBYASID) |
|
||||
VENDOR_F(NRIPS) |
|
||||
VENDOR_F(TSCRATEMSR) |
|
||||
VENDOR_F(V_VMSAVE_VMLOAD) |
|
||||
VENDOR_F(LBRV) |
|
||||
VENDOR_F(PAUSEFILTER) |
|
||||
VENDOR_F(PFTHRESHOLD) |
|
||||
VENDOR_F(VGIF) |
|
||||
VENDOR_F(VNMI) |
|
||||
VENDOR_F(SVME_ADDR_CHK)
|
||||
VENDOR_F(NPT),
|
||||
VENDOR_F(VMCBCLEAN),
|
||||
VENDOR_F(FLUSHBYASID),
|
||||
VENDOR_F(NRIPS),
|
||||
VENDOR_F(TSCRATEMSR),
|
||||
VENDOR_F(V_VMSAVE_VMLOAD),
|
||||
VENDOR_F(LBRV),
|
||||
VENDOR_F(PAUSEFILTER),
|
||||
VENDOR_F(PFTHRESHOLD),
|
||||
VENDOR_F(VGIF),
|
||||
VENDOR_F(VNMI),
|
||||
VENDOR_F(SVME_ADDR_CHK),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_001F_EAX,
|
||||
VENDOR_F(SME) |
|
||||
VENDOR_F(SEV) |
|
||||
0 /* VM_PAGE_FLUSH */ |
|
||||
VENDOR_F(SEV_ES) |
|
||||
F(SME_COHERENT)
|
||||
VENDOR_F(SME),
|
||||
VENDOR_F(SEV),
|
||||
/* VM_PAGE_FLUSH */
|
||||
VENDOR_F(SEV_ES),
|
||||
F(SME_COHERENT),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_0021_EAX,
|
||||
F(NO_NESTED_DATA_BP) |
|
||||
F(NO_NESTED_DATA_BP),
|
||||
/*
|
||||
* Synthesize "LFENCE is serializing" into the AMD-defined entry
|
||||
* in KVM's supported CPUID, i.e. if the feature is reported as
|
||||
|
|
@ -1165,36 +1170,36 @@ void kvm_set_cpu_caps(void)
|
|||
* CPUID will drop the flags, and reporting support in AMD's
|
||||
* leaf can make it easier for userspace to detect the feature.
|
||||
*/
|
||||
SYNTHESIZED_F(LFENCE_RDTSC) |
|
||||
0 /* SmmPgCfgLock */ |
|
||||
F(NULL_SEL_CLR_BASE) |
|
||||
F(AUTOIBRS) |
|
||||
EMULATED_F(NO_SMM_CTL_MSR) |
|
||||
0 /* PrefetchCtlMsr */ |
|
||||
F(WRMSR_XX_BASE_NS) |
|
||||
SYNTHESIZED_F(SBPB) |
|
||||
SYNTHESIZED_F(IBPB_BRTYPE) |
|
||||
SYNTHESIZED_F(SRSO_NO)
|
||||
SYNTHESIZED_F(LFENCE_RDTSC),
|
||||
/* SmmPgCfgLock */
|
||||
F(NULL_SEL_CLR_BASE),
|
||||
F(AUTOIBRS),
|
||||
EMULATED_F(NO_SMM_CTL_MSR),
|
||||
/* PrefetchCtlMsr */
|
||||
F(WRMSR_XX_BASE_NS),
|
||||
SYNTHESIZED_F(SBPB),
|
||||
SYNTHESIZED_F(IBPB_BRTYPE),
|
||||
SYNTHESIZED_F(SRSO_NO),
|
||||
);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_8000_0022_EAX,
|
||||
F(PERFMON_V2)
|
||||
F(PERFMON_V2),
|
||||
);
|
||||
|
||||
if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
|
||||
kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE);
|
||||
|
||||
kvm_cpu_cap_init(CPUID_C000_0001_EDX,
|
||||
F(XSTORE) |
|
||||
F(XSTORE_EN) |
|
||||
F(XCRYPT) |
|
||||
F(XCRYPT_EN) |
|
||||
F(ACE2) |
|
||||
F(ACE2_EN) |
|
||||
F(PHE) |
|
||||
F(PHE_EN) |
|
||||
F(PMM) |
|
||||
F(PMM_EN)
|
||||
F(XSTORE),
|
||||
F(XSTORE_EN),
|
||||
F(XCRYPT),
|
||||
F(XCRYPT_EN),
|
||||
F(ACE2),
|
||||
F(ACE2_EN),
|
||||
F(PHE),
|
||||
F(PHE_EN),
|
||||
F(PMM),
|
||||
F(PMM_EN),
|
||||
);
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user