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dt-bindings: pinctrl: qcom,msm8976: convert to dtschema
Convert Qualcomm MSM8976 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Changes during conversion: update the list of non-mux pins (like sdc1) to match Linux driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20221110085230.15108-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Krzysztof Kozlowski
parent
51cd31ae20
commit
86bfee318b
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@ -1,183 +0,0 @@
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Qualcomm MSM8976 TLMM block
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This binding describes the Top Level Mode Multiplexer block found in the
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MSM8956 and MSM8976 platforms.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,msm8976-pinctrl"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the TLMM register space.
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the TLMM summary IRQ.
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- interrupt-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as an interrupt controller
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- #interrupt-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/interrupt-controller/irq.h>
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- gpio-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as a gpio controller
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- #gpio-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/gpio/gpio.h>
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- gpio-ranges:
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Usage: required
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Definition: see ../gpio/gpio.txt
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- gpio-reserved-ranges:
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Usage: optional
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Definition: see ../gpio/gpio.txt
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Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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a general description of GPIO and interrupt bindings.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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The pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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PIN CONFIGURATION NODES:
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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- pins:
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Usage: required
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Value type: <string-array>
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Definition: List of gpio pins affected by the properties specified in
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this subnode.
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Valid pins are:
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gpio0-gpio145
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Supports mux, bias and drive-strength
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sdc1_clk, sdc1_cmd, sdc1_data,
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sdc2_clk, sdc2_cmd, sdc2_data,
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sdc3_clk, sdc3_cmd, sdc3_data
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Supports bias and drive-strength
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- function:
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Usage: required
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Value type: <string>
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Definition: Specify the alternative function to be configured for the
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specified pins. Functions are only valid for gpio pins.
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Valid values are:
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gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,
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blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,
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qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,
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blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,
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qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,
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qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,
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blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,
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sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,
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blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,
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uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,
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uim1_present, uim2_data, uim2_clk, uim2_reset,
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uim2_present, ts_xvdd, mipi_dsi0, us_euro, ts_resout,
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ts_sample, sec_mi2s_mclk_b, pri_mi2s, codec_reset,
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cdc_pdm0, us_emitter, pri_mi2s_mclk_b, pri_mi2s_mclk_c,
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lpass_slimbus, lpass_slimbus0, lpass_slimbus1, codec_int1,
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codec_int2, wcss_bt, sdc3, wcss_wlan2, wcss_wlan1,
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wcss_wlan0, wcss_wlan, wcss_fm, key_volp, key_snapshot,
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key_focus, key_home, pwr_down, dmic0_clk, hdmi_int,
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dmic0_data, wsa_vi, wsa_en, blsp_spi8, wsa_irq, blsp_i2c8,
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pa_indicator, modem_tsync, ssbi_wtr1, gsm1_tx, gsm0_tx,
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sdcard_det, sec_mi2s, ss_switch,
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- bias-disable:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as no pull.
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- bias-pull-down:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull down.
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- bias-pull-up:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull up.
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- output-high:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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high.
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Not valid for sdc pins.
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- output-low:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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low.
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Not valid for sdc pins.
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- drive-strength:
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Usage: optional
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Value type: <u32>
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Definition: Selects the drive strength for the specified pins, in mA.
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Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
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Example:
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tlmm: pinctrl@1000000 {
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compatible = "qcom,msm8976-pinctrl";
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reg = <0x1000000 0x300000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&tlmm 0 0 145>;
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interrupt-controller;
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#interrupt-cells = <2>;
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blsp1_uart2_active: blsp1_uart2_active {
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mux {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "blsp_uart2";
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};
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config {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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@ -0,0 +1,136 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm MSM8976 TLMM pin controller
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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description:
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Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC.
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properties:
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compatible:
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const: qcom,msm8976-pinctrl
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reg:
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maxItems: 1
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interrupts: true
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interrupt-controller: true
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"#interrupt-cells": true
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gpio-controller: true
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"#gpio-cells": true
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gpio-ranges: true
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wakeup-parent: true
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gpio-reserved-ranges:
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minItems: 1
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maxItems: 73
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gpio-line-names:
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maxItems: 145
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-msm8976-tlmm-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-msm8976-tlmm-state"
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additionalProperties: false
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$defs:
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qcom-msm8976-tlmm-state:
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type: object
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description:
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Desired pin configuration for a device or its specific state (like sleep
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or active).
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$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this state.
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items:
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oneOf:
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- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$"
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- enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
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qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk,
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sdc2_clk, sdc2_cmd, sdc2_data ]
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minItems: 1
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maxItems: 36
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function:
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description:
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Specify the alternative function to be configured for the specified
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pins.
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enum: [ gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,
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blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,
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qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,
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blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,
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qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,
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qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,
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blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,
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sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,
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blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,
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uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,
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uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present,
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ts_xvdd, mipi_dsi0, us_euro, ts_resout, ts_sample,
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sec_mi2s_mclk_b, pri_mi2s, codec_reset, cdc_pdm0, us_emitter,
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pri_mi2s_mclk_b, pri_mi2s_mclk_c, lpass_slimbus,
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lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2,
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wcss_bt, sdc3, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,
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wcss_fm, key_volp, key_snapshot, key_focus, key_home, pwr_down,
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dmic0_clk, hdmi_int, dmic0_data, wsa_vi, wsa_en, blsp_spi8,
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wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1,
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gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ]
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bias-pull-down: true
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bias-pull-up: true
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bias-disable: true
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drive-strength: true
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input-enable: true
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output-high: true
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output-low: true
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required:
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- pins
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additionalProperties: false
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allOf:
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- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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tlmm: pinctrl@1000000 {
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compatible = "qcom,msm8976-pinctrl";
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reg = <0x1000000 0x300000>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&tlmm 0 0 145>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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blsp1-uart2-active-state {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "blsp_uart2";
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drive-strength = <2>;
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bias-disable;
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};
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};
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